/**
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********************************************************************************
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* @file stm8s_uart3.c
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* @author MCD Application Team
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* @version V2.2.0
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* @date 30-September-2014
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* @brief This file contains all the functions for the uart3 peripheral.
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
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*
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* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
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* You may not use this file except in compliance with the License.
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* You may obtain a copy of the License at:
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*
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* http://www.st.com/software_license_agreement_liberty_v2
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm8s_uart3.h"
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/** @addtogroup STM8S_StdPeriph_Driver
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* @{
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*/
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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/* Private functions ---------------------------------------------------------*/
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/* Public functions ----------------------------------------------------------*/
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/** @}
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* @addtogroup UART3_Public_Functions
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* @{
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*/
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/**
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* @brief Deinitializes the UART peripheral.
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* @param None
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* @retval None
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*/
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void UART3_DeInit(void)
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{
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/* Clear the Idle Line Detected bit in the status rerister by a read
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to the UART3_SR register followed by a Read to the UART3_DR register */
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(void) UART3->SR;
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(void) UART3->DR;
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UART3->BRR2 = UART3_BRR2_RESET_VALUE; /*Set UART3_BRR2 to reset value 0x00 */
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UART3->BRR1 = UART3_BRR1_RESET_VALUE; /*Set UART3_BRR1 to reset value 0x00 */
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UART3->CR1 = UART3_CR1_RESET_VALUE; /*Set UART3_CR1 to reset value 0x00 */
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UART3->CR2 = UART3_CR2_RESET_VALUE; /*Set UART3_CR2 to reset value 0x00 */
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UART3->CR3 = UART3_CR3_RESET_VALUE; /*Set UART3_CR3 to reset value 0x00 */
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UART3->CR4 = UART3_CR4_RESET_VALUE; /*Set UART3_CR4 to reset value 0x00 */
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UART3->CR6 = UART3_CR6_RESET_VALUE; /*Set UART3_CR6 to reset value 0x00 */
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}
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/**
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* @brief Initializes the UART3 according to the specified parameters.
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* @param BaudRate: The baudrate.
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* @param WordLength : This parameter can be any of
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* the @ref UART3_WordLength_TypeDef enumeration.
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* @param StopBits: This parameter can be any of the
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* @ref UART3_StopBits_TypeDef enumeration.
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* @param Parity: This parameter can be any of the
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* @ref UART3_Parity_TypeDef enumeration.
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* @param Mode: This parameter can be any of the @ref UART3_Mode_TypeDef values
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* @retval None
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*/
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void UART3_Init(uint32_t BaudRate, UART3_WordLength_TypeDef WordLength,
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UART3_StopBits_TypeDef StopBits, UART3_Parity_TypeDef Parity,
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UART3_Mode_TypeDef Mode)
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{
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uint8_t BRR2_1 = 0, BRR2_2 = 0;
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uint32_t BaudRate_Mantissa = 0, BaudRate_Mantissa100 = 0;
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/* Check the parameters */
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assert_param(IS_UART3_WORDLENGTH_OK(WordLength));
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assert_param(IS_UART3_STOPBITS_OK(StopBits));
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assert_param(IS_UART3_PARITY_OK(Parity));
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assert_param(IS_UART3_BAUDRATE_OK(BaudRate));
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assert_param(IS_UART3_MODE_OK((uint8_t)Mode));
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/* Clear the word length bit */
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UART3->CR1 &= (uint8_t)(~UART3_CR1_M);
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/* Set the word length bit according to UART3_WordLength value */
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UART3->CR1 |= (uint8_t)WordLength;
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/* Clear the STOP bits */
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UART3->CR3 &= (uint8_t)(~UART3_CR3_STOP);
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/* Set the STOP bits number according to UART3_StopBits value */
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UART3->CR3 |= (uint8_t)StopBits;
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/* Clear the Parity Control bit */
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UART3->CR1 &= (uint8_t)(~(UART3_CR1_PCEN | UART3_CR1_PS));
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/* Set the Parity Control bit to UART3_Parity value */
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UART3->CR1 |= (uint8_t)Parity;
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/* Clear the LSB mantissa of UART3DIV */
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UART3->BRR1 &= (uint8_t)(~UART3_BRR1_DIVM);
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/* Clear the MSB mantissa of UART3DIV */
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UART3->BRR2 &= (uint8_t)(~UART3_BRR2_DIVM);
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/* Clear the Fraction bits of UART3DIV */
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UART3->BRR2 &= (uint8_t)(~UART3_BRR2_DIVF);
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/* Set the UART3 BaudRates in BRR1 and BRR2 registers according to UART3_BaudRate value */
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BaudRate_Mantissa = ((uint32_t)CLK_GetClockFreq() / (BaudRate << 4));
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BaudRate_Mantissa100 = (((uint32_t)CLK_GetClockFreq() * 100) / (BaudRate << 4));
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/* The fraction and MSB mantissa should be loaded in one step in the BRR2 register */
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/* Set the fraction of UART3DIV */
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BRR2_1 = (uint8_t)((uint8_t)(((BaudRate_Mantissa100 - (BaudRate_Mantissa * 100))
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<< 4) / 100) & (uint8_t)0x0F);
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BRR2_2 = (uint8_t)((BaudRate_Mantissa >> 4) & (uint8_t)0xF0);
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UART3->BRR2 = (uint8_t)(BRR2_1 | BRR2_2);
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/* Set the LSB mantissa of UART3DIV */
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UART3->BRR1 = (uint8_t)BaudRate_Mantissa;
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if ((uint8_t)(Mode & UART3_MODE_TX_ENABLE))
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{
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/* Set the Transmitter Enable bit */
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UART3->CR2 |= UART3_CR2_TEN;
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}
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else
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{
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/* Clear the Transmitter Disable bit */
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UART3->CR2 &= (uint8_t)(~UART3_CR2_TEN);
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}
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if ((uint8_t)(Mode & UART3_MODE_RX_ENABLE))
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{
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/* Set the Receiver Enable bit */
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UART3->CR2 |= UART3_CR2_REN;
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}
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else
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{
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/* Clear the Receiver Disable bit */
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UART3->CR2 &= (uint8_t)(~UART3_CR2_REN);
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}
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}
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/**
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* @brief Enable the UART1 peripheral.
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* @param NewState : The new state of the UART Communication.
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* This parameter can be any of the @ref FunctionalState enumeration.
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* @retval None
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*/
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void UART3_Cmd(FunctionalState NewState)
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{
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if (NewState != DISABLE)
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{
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/* UART3 Enable */
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UART3->CR1 &= (uint8_t)(~UART3_CR1_UARTD);
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}
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else
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{
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/* UART3 Disable */
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UART3->CR1 |= UART3_CR1_UARTD;
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}
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}
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/**
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* @brief Enables or disables the specified UART3 interrupts.
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* @param UART3_IT specifies the UART3 interrupt sources to be enabled or disabled.
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* This parameter can be one of the following values:
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* - UART3_IT_LBDF: LIN Break detection interrupt
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* - UART3_IT_LHDF: LIN Break detection interrupt
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* - UART3_IT_TXE: Transmit Data Register empty interrupt
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* - UART3_IT_TC: Transmission complete interrupt
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* - UART3_IT_RXNE_OR: Receive Data register not empty/Over run error interrupt
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* - UART3_IT_IDLE: Idle line detection interrupt
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* - UART3_IT_PE: Parity Error interrupt
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* @param NewState new state of the specified UART3 interrupts.
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* This parameter can be: ENABLE or DISABLE.
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* @retval None
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*/
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void UART3_ITConfig(UART3_IT_TypeDef UART3_IT, FunctionalState NewState)
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{
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uint8_t uartreg = 0, itpos = 0x00;
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/* Check the parameters */
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assert_param(IS_UART3_CONFIG_IT_OK(UART3_IT));
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assert_param(IS_FUNCTIONALSTATE_OK(NewState));
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/* Get the UART3 register index */
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uartreg = (uint8_t)((uint16_t)UART3_IT >> 0x08);
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/* Get the UART3 IT index */
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itpos = (uint8_t)((uint8_t)1 << (uint8_t)((uint8_t)UART3_IT & (uint8_t)0x0F));
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if (NewState != DISABLE)
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{
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/* Enable the Interrupt bits according to UART3_IT mask */
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if (uartreg == 0x01)
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{
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UART3->CR1 |= itpos;
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}
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else if (uartreg == 0x02)
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{
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UART3->CR2 |= itpos;
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}
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else if (uartreg == 0x03)
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{
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UART3->CR4 |= itpos;
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}
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else
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{
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UART3->CR6 |= itpos;
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}
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}
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else
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{
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/* Disable the interrupt bits according to UART3_IT mask */
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if (uartreg == 0x01)
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{
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UART3->CR1 &= (uint8_t)(~itpos);
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}
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else if (uartreg == 0x02)
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{
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UART3->CR2 &= (uint8_t)(~itpos);
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}
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else if (uartreg == 0x03)
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{
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UART3->CR4 &= (uint8_t)(~itpos);
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}
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else
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{
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UART3->CR6 &= (uint8_t)(~itpos);
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}
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}
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}
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/**
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* @brief Sets the UART3 LIN Break detection length.
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* @param UART3_LINBreakDetectionLength specifies the LIN break detection length.
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* This parameter can be any of the
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* @ref UART3_LINBreakDetectionLength_TypeDef values.
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* @retval None
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*/
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void UART3_LINBreakDetectionConfig(UART3_LINBreakDetectionLength_TypeDef UART3_LINBreakDetectionLength)
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{
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/* Check the parameters */
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assert_param(IS_UART3_LINBREAKDETECTIONLENGTH_OK(UART3_LINBreakDetectionLength));
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if (UART3_LINBreakDetectionLength != UART3_LINBREAKDETECTIONLENGTH_10BITS)
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{
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UART3->CR4 |= UART3_CR4_LBDL;
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}
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else
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{
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UART3->CR4 &= ((uint8_t)~UART3_CR4_LBDL);
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}
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}
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/**
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* @brief Configure the UART3 peripheral.
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* @param UART3_Mode specifies the LIN mode.
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* This parameter can be any of the @ref UART3_LinMode_TypeDef values.
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* @param UART3_Autosync specifies the LIN automatic resynchronization mode.
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* This parameter can be any of the @ref UART3_LinAutosync_TypeDef values.
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* @param UART3_DivUp specifies the LIN divider update method.
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* This parameter can be any of the @ref UART3_LinDivUp_TypeDef values.
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* @retval None
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*/
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void UART3_LINConfig(UART3_LinMode_TypeDef UART3_Mode,
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UART3_LinAutosync_TypeDef UART3_Autosync,
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UART3_LinDivUp_TypeDef UART3_DivUp)
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{
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/* Check the parameters */
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assert_param(IS_UART3_SLAVE_OK(UART3_Mode));
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assert_param(IS_UART3_AUTOSYNC_OK(UART3_Autosync));
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assert_param(IS_UART3_DIVUP_OK(UART3_DivUp));
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if (UART3_Mode != UART3_LIN_MODE_MASTER)
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{
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UART3->CR6 |= UART3_CR6_LSLV;
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}
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else
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{
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UART3->CR6 &= ((uint8_t)~UART3_CR6_LSLV);
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}
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if (UART3_Autosync != UART3_LIN_AUTOSYNC_DISABLE)
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{
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UART3->CR6 |= UART3_CR6_LASE ;
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}
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else
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{
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UART3->CR6 &= ((uint8_t)~ UART3_CR6_LASE );
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}
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if (UART3_DivUp != UART3_LIN_DIVUP_LBRR1)
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{
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UART3->CR6 |= UART3_CR6_LDUM;
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}
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else
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{
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UART3->CR6 &= ((uint8_t)~ UART3_CR6_LDUM);
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}
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}
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/**
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* @brief Enables or disables the UART3 LIN mode.
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* @param NewState is new state of the UART3 LIN mode.
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* This parameter can be ENABLE or DISABLE
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* @retval None
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*/
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void UART3_LINCmd(FunctionalState NewState)
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{
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/* Check the parameters */
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assert_param(IS_FUNCTIONALSTATE_OK(NewState));
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if (NewState != DISABLE)
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{
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/* Enable the LIN mode by setting the LINE bit in the CR2 register */
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UART3->CR3 |= UART3_CR3_LINEN;
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}
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else
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{
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/* Disable the LIN mode by clearing the LINE bit in the CR2 register */
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UART3->CR3 &= ((uint8_t)~UART3_CR3_LINEN);
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}
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}
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/**
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* @brief Selects the UART3 WakeUp method.
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* @param UART3_WakeUp: specifies the UART3 wakeup method.
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* This parameter can be any of the @ref UART3_WakeUp_TypeDef values.
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* @retval None
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*/
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void UART3_WakeUpConfig(UART3_WakeUp_TypeDef UART3_WakeUp)
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{
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/* Check the parameters */
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assert_param(IS_UART3_WAKEUP_OK(UART3_WakeUp));
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UART3->CR1 &= ((uint8_t)~UART3_CR1_WAKE);
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UART3->CR1 |= (uint8_t)UART3_WakeUp;
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}
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/**
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* @brief Determines if the UART3 is in mute mode or not.
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* @param NewState: new state of the UART3 mode.
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* This parameter can be ENABLE or DISABLE
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* @retval None
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*/
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void UART3_ReceiverWakeUpCmd(FunctionalState NewState)
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{
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/* Check the parameters */
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assert_param(IS_FUNCTIONALSTATE_OK(NewState));
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if (NewState != DISABLE)
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{
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/* Enable the mute mode UART3 by setting the RWU bit in the CR2 register */
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UART3->CR2 |= UART3_CR2_RWU;
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}
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else
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{
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/* Disable the mute mode UART3 by clearing the RWU bit in the CR1 register */
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UART3->CR2 &= ((uint8_t)~UART3_CR2_RWU);
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}
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}
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/**
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* @brief Returns the most recent received data by the UART3 peripheral.
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* @param None
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* @retval Received Data
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*/
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uint8_t UART3_ReceiveData8(void)
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{
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return ((uint8_t)UART3->DR);
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}
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/**
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* @brief Returns the most recent received data by the UART3 peripheral.
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* @param None
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* @retval Received Data
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*/
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uint16_t UART3_ReceiveData9(void)
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{
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uint16_t temp = 0;
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temp = (uint16_t)(((uint16_t)((uint16_t)UART3->CR1 & (uint16_t)UART3_CR1_R8)) << 1);
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return (uint16_t)((((uint16_t)UART3->DR) | temp) & ((uint16_t)0x01FF));
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}
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/**
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* @brief Transmits 8 bit data through the UART3 peripheral.
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* @param Data the data to transmit.
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* @retval None
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*/
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void UART3_SendData8(uint8_t Data)
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{
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/* Transmit Data */
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UART3->DR = Data;
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}
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/**
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* @brief Transmits 9 bit data through the UART3 peripheral.
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* @param Data: the data to transmit.
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* @retval None
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*/
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void UART3_SendData9(uint16_t Data)
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{
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/* Clear the transmit data bit 8 */
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UART3->CR1 &= ((uint8_t)~UART3_CR1_T8);
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/* Write the transmit data bit [8] */
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UART3->CR1 |= (uint8_t)(((uint8_t)(Data >> 2)) & UART3_CR1_T8);
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/* Write the transmit data bit [0:7] */
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UART3->DR = (uint8_t)(Data);
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}
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/**
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* @brief Transmits break characters.
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* @param None
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* @retval None
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*/
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void UART3_SendBreak(void)
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{
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UART3->CR2 |= UART3_CR2_SBK;
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}
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/**
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* @brief Sets the address of the UART3 node.
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* @param UART3_Address: Indicates the address of the UART3 node.
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* @retval None
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*/
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void UART3_SetAddress(uint8_t UART3_Address)
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{
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/* Check the parameters */
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assert_param(IS_UART3_ADDRESS_OK(UART3_Address));
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/* Clear the UART3 address */
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UART3->CR4 &= ((uint8_t)~UART3_CR4_ADD);
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/* Set the UART3 address node */
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UART3->CR4 |= UART3_Address;
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}
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/**
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* @brief Checks whether the specified UART3 flag is set or not.
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* @param UART3_FLAG specifies the flag to check.
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* This parameter can be any of the @ref UART3_Flag_TypeDef enumeration.
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* @retval FlagStatus (SET or RESET)
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*/
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FlagStatus UART3_GetFlagStatus(UART3_Flag_TypeDef UART3_FLAG)
|
{
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FlagStatus status = RESET;
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|
/* Check parameters */
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assert_param(IS_UART3_FLAG_OK(UART3_FLAG));
|
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/* Check the status of the specified UART3 flag*/
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if (UART3_FLAG == UART3_FLAG_LBDF)
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{
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if ((UART3->CR4 & (uint8_t)UART3_FLAG) != (uint8_t)0x00)
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{
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/* UART3_FLAG is set*/
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status = SET;
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}
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else
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{
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/* UART3_FLAG is reset*/
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status = RESET;
|
}
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}
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else if (UART3_FLAG == UART3_FLAG_SBK)
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{
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if ((UART3->CR2 & (uint8_t)UART3_FLAG) != (uint8_t)0x00)
|
{
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/* UART3_FLAG is set*/
|
status = SET;
|
}
|
else
|
{
|
/* UART3_FLAG is reset*/
|
status = RESET;
|
}
|
}
|
else if ((UART3_FLAG == UART3_FLAG_LHDF) || (UART3_FLAG == UART3_FLAG_LSF))
|
{
|
if ((UART3->CR6 & (uint8_t)UART3_FLAG) != (uint8_t)0x00)
|
{
|
/* UART3_FLAG is set*/
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status = SET;
|
}
|
else
|
{
|
/* UART3_FLAG is reset*/
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status = RESET;
|
}
|
}
|
else
|
{
|
if ((UART3->SR & (uint8_t)UART3_FLAG) != (uint8_t)0x00)
|
{
|
/* UART3_FLAG is set*/
|
status = SET;
|
}
|
else
|
{
|
/* UART3_FLAG is reset*/
|
status = RESET;
|
}
|
}
|
|
/* Return the UART3_FLAG status*/
|
return status;
|
}
|
|
/**
|
* @brief Clears the UART3 flags.
|
* @param UART3_FLAG specifies the flag to clear
|
* This parameter can be any combination of the following values:
|
* - UART3_FLAG_LBDF: LIN Break detection flag.
|
* - UART3_FLAG_LHDF: LIN Header detection flag.
|
* - UART3_FLAG_LSF: LIN synchrone field flag.
|
* - UART3_FLAG_RXNE: Receive data register not empty flag.
|
* @note
|
* - PE (Parity error), FE (Framing error), NF (Noise error),
|
* OR (OverRun error) and IDLE (Idle line detected) flags are cleared
|
* by software sequence: a read operation to UART3_SR register
|
* (UART3_GetFlagStatus())followed by a read operation to UART3_DR
|
* register(UART3_ReceiveData8() or UART3_ReceiveData9()).
|
*
|
* - RXNE flag can be also cleared by a read to the UART3_DR register
|
* (UART3_ReceiveData8()or UART3_ReceiveData9()).
|
*
|
* - TC flag can be also cleared by software sequence: a read operation
|
* to UART3_SR register (UART3_GetFlagStatus()) followed by a write
|
* operation to UART3_DR register (UART3_SendData8() or UART3_SendData9()).
|
*
|
* - TXE flag is cleared only by a write to the UART3_DR register
|
* (UART3_SendData8() or UART3_SendData9()).
|
*
|
* - SBK flag is cleared during the stop bit of break.
|
* @retval None
|
*/
|
void UART3_ClearFlag(UART3_Flag_TypeDef UART3_FLAG)
|
{
|
/* Check the parameters */
|
assert_param(IS_UART3_CLEAR_FLAG_OK(UART3_FLAG));
|
|
/*Clear the Receive Register Not Empty flag */
|
if (UART3_FLAG == UART3_FLAG_RXNE)
|
{
|
UART3->SR = (uint8_t)~(UART3_SR_RXNE);
|
}
|
/*Clear the LIN Break Detection flag */
|
else if (UART3_FLAG == UART3_FLAG_LBDF)
|
{
|
UART3->CR4 &= (uint8_t)(~UART3_CR4_LBDF);
|
}
|
/*Clear the LIN Header Detection Flag */
|
else if (UART3_FLAG == UART3_FLAG_LHDF)
|
{
|
UART3->CR6 &= (uint8_t)(~UART3_CR6_LHDF);
|
}
|
/*Clear the LIN Synch Field flag */
|
else
|
{
|
UART3->CR6 &= (uint8_t)(~UART3_CR6_LSF);
|
}
|
}
|
|
/**
|
* @brief Checks whether the specified UART3 interrupt has occurred or not.
|
* @param UART3_IT: Specifies the UART3 interrupt pending bit to check.
|
* This parameter can be one of the following values:
|
* - UART3_IT_LBDF: LIN Break detection interrupt
|
* - UART3_IT_TXE: Transmit Data Register empty interrupt
|
* - UART3_IT_TC: Transmission complete interrupt
|
* - UART3_IT_RXNE: Receive Data register not empty interrupt
|
* - UART3_IT_IDLE: Idle line detection interrupt
|
* - UART3_IT_OR: OverRun Error interrupt
|
* - UART3_IT_PE: Parity Error interrupt
|
* @retval The state of UART3_IT (SET or RESET).
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*/
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ITStatus UART3_GetITStatus(UART3_IT_TypeDef UART3_IT)
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{
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ITStatus pendingbitstatus = RESET;
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uint8_t itpos = 0;
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uint8_t itmask1 = 0;
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uint8_t itmask2 = 0;
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uint8_t enablestatus = 0;
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/* Check parameters */
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assert_param(IS_UART3_GET_IT_OK(UART3_IT));
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/* Get the UART3 IT index*/
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itpos = (uint8_t)((uint8_t)1 << (uint8_t)((uint8_t)UART3_IT & (uint8_t)0x0F));
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/* Get the UART3 IT index*/
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itmask1 = (uint8_t)((uint8_t)UART3_IT >> (uint8_t)4);
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/* Set the IT mask*/
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itmask2 = (uint8_t)((uint8_t)1 << itmask1);
|
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/* Check the status of the specified UART3 pending bit*/
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if (UART3_IT == UART3_IT_PE)
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{
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/* Get the UART3_ITPENDINGBIT enable bit status*/
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enablestatus = (uint8_t)((uint8_t)UART3->CR1 & itmask2);
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/* Check the status of the specified UART3 interrupt*/
|
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if (((UART3->SR & itpos) != (uint8_t)0x00) && enablestatus)
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{
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/* Interrupt occurred*/
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pendingbitstatus = SET;
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}
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else
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{
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/* Interrupt not occurred*/
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pendingbitstatus = RESET;
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}
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}
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else if (UART3_IT == UART3_IT_LBDF)
|
{
|
/* Get the UART3_IT enable bit status*/
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enablestatus = (uint8_t)((uint8_t)UART3->CR4 & itmask2);
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/* Check the status of the specified UART3 interrupt*/
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if (((UART3->CR4 & itpos) != (uint8_t)0x00) && enablestatus)
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{
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/* Interrupt occurred*/
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pendingbitstatus = SET;
|
}
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else
|
{
|
/* Interrupt not occurred*/
|
pendingbitstatus = RESET;
|
}
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}
|
else if (UART3_IT == UART3_IT_LHDF)
|
{
|
/* Get the UART3_IT enable bit status*/
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enablestatus = (uint8_t)((uint8_t)UART3->CR6 & itmask2);
|
/* Check the status of the specified UART3 interrupt*/
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if (((UART3->CR6 & itpos) != (uint8_t)0x00) && enablestatus)
|
{
|
/* Interrupt occurred*/
|
pendingbitstatus = SET;
|
}
|
else
|
{
|
/* Interrupt not occurred*/
|
pendingbitstatus = RESET;
|
}
|
}
|
else
|
{
|
/* Get the UART3_IT enable bit status*/
|
enablestatus = (uint8_t)((uint8_t)UART3->CR2 & itmask2);
|
/* Check the status of the specified UART3 interrupt*/
|
if (((UART3->SR & itpos) != (uint8_t)0x00) && enablestatus)
|
{
|
/* Interrupt occurred*/
|
pendingbitstatus = SET;
|
}
|
else
|
{
|
/* Interrupt not occurred*/
|
pendingbitstatus = RESET;
|
}
|
}
|
/* Return the UART3_IT status*/
|
return pendingbitstatus;
|
}
|
|
/**
|
* @brief Clears the UART3 pending flags.
|
* @param UART3_IT specifies the pending bit to clear
|
* This parameter can be one of the following values:
|
* - UART3_IT_LBDF: LIN Break detection interrupt
|
* - UART3_IT_LHDF: LIN Header detection interrupt
|
* - UART3_IT_RXNE: Receive Data register not empty interrupt.
|
*
|
* @note
|
* - PE (Parity error), FE (Framing error), NF (Noise error),
|
* OR (OverRun error) and IDLE (Idle line detected) pending bits are
|
* cleared by software sequence: a read operation to UART3_SR register
|
* (UART3_GetITStatus()) followed by a read operation to UART3_DR register
|
* (UART3_ReceiveData8() or UART3_ReceiveData9()).
|
*
|
* - RXNE pending bit can be also cleared by a read to the UART3_DR register
|
* (UART3_ReceiveData8() or UART3_ReceiveData9() ).
|
*
|
* - TC (Transmit complete) pending bit can be cleared by software
|
* sequence: a read operation to UART3_SR register (UART3_GetITStatus())
|
* followed by a write operation to UART3_DR register
|
* (UART3_SendData8()or UART3_SendData9()).
|
*
|
* - TXE pending bit is cleared only by a write to the UART3_DR register
|
* (UART3_SendData8() or UART3_SendData9()).
|
* @retval None
|
*/
|
void UART3_ClearITPendingBit(UART3_IT_TypeDef UART3_IT)
|
{
|
/* Check the parameters */
|
assert_param(IS_UART3_CLEAR_IT_OK(UART3_IT));
|
|
/*Clear the Receive Register Not Empty pending bit */
|
if (UART3_IT == UART3_IT_RXNE)
|
{
|
UART3->SR = (uint8_t)~(UART3_SR_RXNE);
|
}
|
/*Clear the LIN Break Detection pending bit */
|
else if (UART3_IT == UART3_IT_LBDF)
|
{
|
UART3->CR4 &= (uint8_t)~(UART3_CR4_LBDF);
|
}
|
/*Clear the LIN Header Detection pending bit */
|
else
|
{
|
UART3->CR6 &= (uint8_t)(~UART3_CR6_LHDF);
|
}
|
}
|
|
/**
|
* @}
|
*/
|
|
/**
|
* @}
|
*/
|
|
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
