/**
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******************************************************************************
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* @file xl_uart.c
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* @author Kirk
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* @version 4.5.2
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* @date Fri Mar 26 17:29:12 2021
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* @brief This file provide function about SIM firmware program
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******************************************************************************
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* @attention
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*
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* 2019 by Chipways Communications,Inc. All Rights Reserved.
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* This software is supplied under the terms of a license
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* agreement or non-disclosure agreement with Chipways.
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* Passing on and copying of this document,and communication
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* of its contents is not permitted without prior written
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* authorization.
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*
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* <h2><center>© COPYRIGHT 2019 Chipways</center></h2>
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******************************************************************************
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*/
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#if defined(__cplusplus)
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extern "C" {
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#endif /* __cplusplus */
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/* Includes ---------------------------------------------------------------*/
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#include "xl_sim.h"
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/** @addtogroup XL6600_StdPeriph_Driver
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* @{
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*/
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/** @defgroup SIM SIM Module
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* @brief SIM Driver Modules Library
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* @{
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*/
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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/* Private functions ---------------------------------------------------------*/
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/** @defgroup SIM_Private_Functions
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* @{
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*/
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/**
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* @brief ÖØÐÂÉèÖÃSIM¼Ä´æÆ÷״̬.
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* @param None
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* @retval None
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*/
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void SIM_DeInit(void)
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{
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/* Deinitializes to default reset values */
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SIM->SOPT0 = 0x0000000C;
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SIM->SOPT1 = 0x00000000;
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SIM->PINSEL0 = 0x00000000;
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SIM->PINSEL1 = 0x00000000;
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SIM->SCGC = 0x00000800;
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SIM->CLKDIV = 0x00000000;
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}
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/**
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* @brief ¶ÁÈ¡Æ÷¼þPINID
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* @param None
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* @retval PINID ·µ»ØPinµÄID
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* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
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* @arg PINID_8_PIN: 8Òý½ÅÆ÷¼þ
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* @arg PINID_16_PIN: 16Òý½ÅÆ÷¼þ
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* @arg PINID_20_PIN: 20Òý½ÅÆ÷¼þ
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* @arg PINID_24_PIN: 24Òý½ÅÆ÷¼þ
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* @arg PINID_32_PIN: 32Òý½ÅÆ÷¼þ
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* @arg PINID_44_PIN: 44Òý½ÅÆ÷¼þ
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* @arg PINID_48_PIN: 48Òý½ÅÆ÷¼þ
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* @arg PINID_64_PIN: 64Òý½ÅÆ÷¼þ
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* @arg PINID_80_PIN: 80Òý½ÅÆ÷¼þ
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* @arg PINID_100_PIN: 100Òý½ÅÆ÷¼þ
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* @arg PINID_RESERVE_PIN: ±£Áô
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*/
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uint32_t SIM_ReadFPINID(void)
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{
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return (SIM->SRSID & SIM_SRSID_PINID_MASK) >> SIM_SRSID_PINID_SHIFT;
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}
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/**
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* @brief »ñÈ¡¸´Î»ÔÒò
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* @param SIM: ¸´Î»µÄÔÒò
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* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
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* @arg SIM_ECCERR_RESET: ECCУÑé³ö´í¸´Î»
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* @arg SIM_LVD_RESET: µÍµçѹÌø±ä»òÉϵ縴λ
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* @arg SIM_WDOG_RESET: ¿´ÃŹ·¸´Î»
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* @arg SIM_PIN_RESET: ÍⲿÒý½Å¸´Î»
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* @arg SIM_POR_RESET: Éϵ縴λ
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* @arg SIM_SW_RESET: Èí¼þ¸´Î»
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* @retval ¸´Î»×´Ì¬(TRUE or FALSE)
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*/
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FlagStatus SIM_GetRstCauses(uint32_t ResetCause)
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{
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FlagStatus ret;
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if( ((SIM->SRSID >> ResetCause)&(uint32_t)0x01) != 0u)
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{
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ret = SET;
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}
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else
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{
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ret = RESET;
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}
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return ret;
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}
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/**
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* @brief Çå³ý¸´Î»ÔÒò±êÖ¾
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* @param SIM: Çå³þ¸´Î»µÄÔÒò
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* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
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* @arg SIM_ECCERR_RESET: ECCУÑé³ö´í¸´Î»
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* @arg SIM_LVD_RESET: µÍµçѹÌø±ä»òÉϵ縴λ
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* @arg SIM_WDOG_RESET: ¿´ÃŹ·¸´Î»
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* @arg SIM_PIN_RESET: ÍⲿÒý½Å¸´Î»
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* @arg SIM_POR_RESET: Éϵ縴λ
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* @arg SIM_SW_RESET: Èí¼þ¸´Î»
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* @retval None
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*/
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void SIM_ClrRstCauses(uint8_t ResetCause)
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{
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SIM->SRSID |= ((uint32_t)0x01 << ResetCause);
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}
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/**
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* @brief NMIÒý½ÅʹÄÜ
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* @param State: NMIÒý½ÅʹÄÜ״̬
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* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
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* @arg ENABLE: NMIÒý½ÅʹÄÜ
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* @arg DISABLE: NMIÒý½ÅʧÄÜ
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* @retval None
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*/
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void SIM_SOPT0_NMIECmd(FunctionalState State)
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{
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if(State == ENABLE)
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{
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SIM->SOPT0 |= SIM_SOPT0_NMIE_MASK;
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}
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else
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{
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SIM->SOPT0 &= ~SIM_SOPT0_NMIE_MASK;
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}
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}
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/**
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* @brief RESETÒý½ÅʹÄÜ
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* @param State: RESETÒý½ÅʹÄÜ״̬
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* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
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* @arg ENABLE: RESETÒý½ÅʹÄÜ
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* @arg DISABLE: RESETÒý½ÅʧÄÜ
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* @retval None
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*/
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void SIM_SOPT0_RSTPECmd(FunctionalState State)
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{
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if(State == ENABLE)
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{
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SIM->SOPT0 |= SIM_SOPT0_RSTPE_MASK;
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}
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else
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{
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SIM->SOPT0 &= ~SIM_SOPT0_RSTPE_MASK;
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}
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}
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/**
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* @brief SWDÒý½ÅʹÄÜ
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* @param State: SWDÒý½ÅʹÄÜ״̬
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* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
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* @arg ENABLE: SWDÒý½ÅʹÄÜ
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* @arg DISABLE: SWDÒý½ÅʧÄÜ
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* @retval None
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*/
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void SIM_SOPT0_SWDECmd(FunctionalState State)
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{
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if(State == ENABLE)
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{
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SIM->SOPT0 |= SIM_SOPT0_SWDE_MASK;
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}
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else
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{
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SIM->SOPT0 &= ~SIM_SOPT0_SWDE_MASK;
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}
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}
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/**
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* @brief ACMP´¥·¢FTM2´¥·¢Ô´Ñ¡Ôñ
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* @param TriggerType: ´¥·¢Ô´Ñ¡Ôñ
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* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
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* @arg ACMP0_OUTPUT_TRIGGER_FTM2: ACMP0Êä³ö´¥·¢FTM2
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* @arg ACMP1_OUTPUT_TRIGGER_FTM2: ACMP1Êä³ö´¥·¢FTM2
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* @retval None
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*/
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void SIM_SOPT0_ACMPT_FTM2Config(uint8_t TriggerType)
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{
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if(TriggerType == ACMP1_OUTPUT_TRIGGER_FTM2)
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{
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SIM->SOPT0 |= SIM_SOPT0_ACTRG_MASK;
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}
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else
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{
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SIM->SOPT0 &= ~SIM_SOPT0_ACTRG_MASK;
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}
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}
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/**
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* @brief UART0ÊäÈëÐźÅÂ˲¨Æ÷Ñ¡Ôñ
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* @param FilterType: Â˲¨Æ÷Ñ¡Ôñ
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* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
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* @arg UART0_RXD0_FILTER_NONE: ÎÞÂ˲¨Æ÷
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* @arg UART0_RXD0_FILTER_ACMP0: Â˲¨Æ÷ACMP0
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* @arg UART0_RXD0_FILTER_ACMP1: Â˲¨Æ÷ACMP1
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* @retval None
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*/
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void SIM_SOPT0_UART0FilterConfig(uint32_t FilterType)
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{
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SIM->SOPT0 &= ~SIM_SOPT0_RXDFE_MASK;
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SIM->SOPT0 |= (FilterType << SIM_SOPT0_RXDFE_SHIFT);
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}
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/**
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* @brief FTM1ͨµÀ1²¶×½RTCÒç³öʹÄÜ
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* @param State: FTM1ͨµÀ1²¶×½RTCÒç³öʹÄÜ״̬
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* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
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* @arg ENABLE: ʹÄÜFTM1ͨµÀ1²¶×½RTCÒç³ö
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* @arg DISABLE: ʧÄÜFTM1ͨµÀ1²¶×½RTCÒç³ö
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* @retval None
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*/
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void SIM_SOPT0_FTM1CH1C_RTCOutputCmd(FunctionalState State)
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{
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if(State == ENABLE)
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{
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SIM->SOPT0 |= SIM_SOPT0_RTCC_MASK;
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}
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else
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{
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SIM->SOPT0 &= ~SIM_SOPT0_RTCC_MASK;
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}
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}
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/**
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* @brief FTM1ͨµÀ0²¶×½ACMP0Êä³öʹÄÜ
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* @param State: FTM1ͨµÀ0²¶×½ACMP0Êä³öʹÄÜ״̬
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* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
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* @arg ENABLE: ʹÄÜFTM1ͨµÀ0²¶×½ACMP0Êä³ö
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* @arg DISABLE: ʧÄÜFTM1ͨµÀ0²¶×½ACMP0Êä³ö
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* @retval None
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*/
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void SIM_SOPT0_FTM1CH0C_ACMP0OCmd(FunctionalState State)
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{
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if(State == ENABLE)
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{
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SIM->SOPT0 |= SIM_SOPT0_ACIC_MASK;
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}
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else
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{
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SIM->SOPT0 &= ~SIM_SOPT0_ACIC_MASK;
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}
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}
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/**
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* @brief FTM0ͨµÀ1²¶×½UART0ÊäÈëʹÄÜ
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* @param State: FTM0ͨµÀ1²¶×½UART0ÊäÈëʹÄÜ״̬
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* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
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* @arg ENABLE: ʹÄÜFTM0ͨµÀ1²¶×½UART0ÊäÈë
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* @arg DISABLE: ʧÄÜFTM0ͨµÀ1²¶×½UART0ÊäÈë
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* @retval None
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*/
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void SIM_SOPT0_FTM0CH1C_UART0ICmd(FunctionalState State)
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{
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if(State == ENABLE)
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{
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SIM->SOPT0 |= SIM_SOPT0_RXDCE_MASK;
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}
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else
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{
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SIM->SOPT0 &= ~SIM_SOPT0_RXDCE_MASK;
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}
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}
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/**
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* @brief Éú³ÉFTM2Ä£¿éµÄPWMͬ²½´¥·¢Ê¹ÄÜ
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* @param State: Éú³ÉFTM2Ä£¿éµÄPWMͬ²½´¥·¢Ê¹ÄÜ״̬
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* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
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* @arg ENABLE: ʹÄÜÉú³ÉFTM2Ä£¿éµÄPWMͬ²½´¥·¢
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* @arg DISABLE: ʧÄÜÉú³ÉFTM2Ä£¿éµÄPWMͬ²½´¥·¢
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* @retval None
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*/
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void SIM_SOPT0_FTM2S_PWMCmd(FunctionalState State)
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{
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if(State == ENABLE)
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{
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SIM->SOPT0 |= SIM_SOPT0_FTMSYNC_MASK;
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}
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else
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{
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SIM->SOPT0 &= ~SIM_SOPT0_FTMSYNC_MASK;
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}
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}
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/**
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* @brief FTM0ͨµÀ0µ÷ÖÆUART0Êä³öʹÄÜ
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* @param State: FTM0ͨµÀ0µ÷ÖÆUART0Êä³öʹÄÜ״̬
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* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
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* @arg ENABLE: ʹÄÜFTM0ͨµÀ0µ÷ÖÆUART0Êä³ö
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* @arg DISABLE: ʧÄÜFTM0ͨµÀ0µ÷ÖÆUART0Êä³ö
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* @retval None
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*/
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void SIM_SOPT0_FTM0M_UART0OutputCmd(FunctionalState State)
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{
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if(State == ENABLE)
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{
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SIM->SOPT0 |= SIM_SOPT0_TXDME_MASK;
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}
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else
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{
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SIM->SOPT0 &= ~SIM_SOPT0_TXDME_MASK;
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}
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}
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/**
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* @brief ×ÜÏßʱÖÓÊä³öÅäÖÃ
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* @param Divide: ×ÜÏßʱÖÓÊä³ö·ÖƵ
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* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
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* @arg BUSCLOCK_OUTPUT_DIVIDE_1: ×ÜÏßʱÖÓÊä³ö1·ÖƵ
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* @arg BUSCLOCK_OUTPUT_DIVIDE_2: ×ÜÏßʱÖÓÊä³ö2·ÖƵ
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* @arg BUSCLOCK_OUTPUT_DIVIDE_4: ×ÜÏßʱÖÓÊä³ö4·ÖƵ
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* @arg BUSCLOCK_OUTPUT_DIVIDE_8: ×ÜÏßʱÖÓÊä³ö8·ÖƵ
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* @arg BUSCLOCK_OUTPUT_DIVIDE_16: ×ÜÏßʱÖÓÊä³ö16·ÖƵ
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* @arg BUSCLOCK_OUTPUT_DIVIDE_32: ×ÜÏßʱÖÓÊä³ö32·ÖƵ
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* @arg BUSCLOCK_OUTPUT_DIVIDE_64: ×ÜÏßʱÖÓÊä³ö64·ÖƵ
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* @arg BUSCLOCK_OUTPUT_DIVIDE_128: ×ÜÏßʱÖÓÊä³ö128·ÖƵ
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* @retval None
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*/
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void SIM_SOPT0_BusClockDivide(uint8_t Divide)
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{
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SIM->SOPT0 &= ~SIM_SOPT0_BUSREF_MASK;
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SIM->SOPT0 |= ((uint32_t)Divide << SIM_SOPT0_BUSREF_SHIFT);
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}
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/**
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* @brief ×ÜÏßʱÖÓÊä³öʹÄÜ
|
* @param State: ×ÜÏßʱÖÓÊä³öʹÄÜ״̬
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg ENABLE: ʹÄÜ×ÜÏßʱÖÓÊä³ö
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* @arg DISABLE: ʧÄÜ×ÜÏßʱÖÓÊä³ö
|
* @retval None
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*/
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void SIM_SOPT0_BusClockOutputCmd(FunctionalState State)
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{
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if(State == ENABLE)
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{
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SIM->SOPT0 |= SIM_SOPT0_CLKOE_MASK;
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}
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else
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{
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SIM->SOPT0 &= ~SIM_SOPT0_CLKOE_MASK;
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}
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}
|
|
/**
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* @brief »ñÈ¡FTM2´¥·¢ÑÓ³Ù״̬
|
* @param None
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* @retval FTM2´¥·¢ÑÓ³Ù״̬(TRUE or FALSE)
|
*/
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FlagStatus SIM_SOPT0_FTM2DelayTStatus(void)
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{
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FlagStatus ret;
|
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if( ((SIM->SOPT0 & SIM_SOPT0_DLYACT_MASK) >> SIM_SOPT0_DLYACT_SHIFT) != 0u)
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{
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ret = SET;
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}
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else
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{
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ret = RESET;
|
}
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return ret;
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}
|
|
/**
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* @brief ÅäÖÃFTM2´¥·¢ADC²ÉÑùÑÓ³Ùʱ¼ä
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* @param Delay: FTM2´¥·¢ADC²ÉÑùÑÓ³Ùʱ¼ä(0~255)
|
* @retval None
|
*/
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void SIM_SOPT0_FTM2DelayTConfig(uint8_t Delay)
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{
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SIM->SOPT0 &= ~SIM_SOPT0_DELAY_MASK;
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SIM->SOPT0 |= ((uint32_t)Delay << SIM_SOPT0_DELAY_SHIFT);
|
}
|
|
|
/**
|
* @brief PWTIN2ÊäÈëÐźÅÑ¡Ôñ
|
* @param InputType: PWTIN2ÊäÈëÐźÅ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg PWTIN2_INPUT_ACMP1OUT: ACMP1µÄÊä³öΪPWTIN2µÄÊäÈë
|
* @arg PWTIN2_INPUT_ACMP0OUT: ACMP0µÄÊä³öΪPWTIN2µÄÊäÈë
|
* @retval None
|
*/
|
void SIM_SOPT1_PWTIN2InputConfig(uint8_t InputType)
|
{
|
if(InputType == PWTIN2_INPUT_ACMP0OUT)
|
{
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SIM->SOPT1 |= SIM_SOPT1_ACPWTS_MASK;
|
}
|
else
|
{
|
SIM->SOPT1 &= ~SIM_SOPT1_ACPWTS_MASK;
|
}
|
}
|
|
/**
|
* @brief PWTIN3ÊäÈëÐźÅÑ¡Ôñ
|
* @param None
|
* @param InputType: PWTIN3ÊäÈëÐźÅ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg PWTIN3_INPUT_UART0RX: UART0µÄÊäÈëΪPWTIN3µÄÊäÈë
|
* @arg PWTIN3_INPUT_UART1RX: UART1µÄÊäÈëΪPWTIN3µÄÊäÈë
|
* @arg PWTIN3_INPUT_UART2RX: UART2µÄÊäÈëΪPWTIN3µÄÊäÈë
|
* @retval None
|
*/
|
void SIM_SOPT1_PWTIN3InputConfig(uint8_t InputType)
|
{
|
SIM->SOPT1 &= ~SIM_SOPT1_UARTPWTS_MASK;
|
SIM->SOPT1 |= ((uint32_t)InputType << SIM_SOPT1_UARTPWTS_SHIFT);
|
}
|
|
/**
|
* @brief ADCÓ²¼þ´¥·¢Ô´Ñ¡Ôñ
|
* @param TriggerType: ADCÓ²¼þ´¥·¢Ô´
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg ADC_HT_RTCOVERFLOW: RTCÒç³ö´¥·¢
|
* @arg ADC_HT_FTM0: FTM0´¥·¢
|
* @arg ADC_HT_FTM2UPDATE: FTM2³õʼ´¥·¢
|
* @arg ADC_HT_FTM2CAPTURE: FTM2Æ¥Åä´¥·¢
|
* @arg ADC_HT_PITCH0OVERFLOW: PITͨµÀ0Òç³ö´¥·¢
|
* @arg ADC_HT_PITCH1OVERFLOW: PITͨµÀ1Òç³ö´¥·¢
|
* @arg ADC_HT_ACMP0OUTPUT: ACMP0Êä³ö´¥·¢
|
* @arg ADC_HT_ACMP1OUTPUT: ACMP1Êä³ö´¥·¢
|
* @arg ADC_HT_FTM2CH1MAP: FTM2ͨµÀ1Æ¥Åä´¥·¢
|
* @arg ADC_HT_FTM2CH2MAP: FTM2ͨµÀ2Æ¥Åä´¥·¢
|
* @arg ADC_HT_FTM2CH3MAP: FTM2ͨµÀ3Æ¥Åä´¥·¢
|
* @arg ADC_HT_FTM2CH4MAP: FTM2ͨµÀ4Æ¥Åä´¥·¢
|
* @arg ADC_HT_FTM2CH5MAP: FTM2ͨµÀ5Æ¥Åä´¥·¢
|
* @arg ADC_HT_FTM1CH0MAP: FTM1ͨµÀ0Æ¥Åä´¥·¢
|
* @arg ADC_HT_FTM1CH1MAP: FTM1ͨµÀ1Æ¥Åä´¥·¢
|
* @arg ADC_HT_FTM0CH1MAP: FTM0ͨµÀ1Æ¥Åä´¥·¢
|
* @retval None
|
*/
|
void SIM_SOPT1_ADCHardwareTConfig(uint8_t TriggerType)
|
{
|
SIM->SOPT1 &= ~SIM_SOPT1_ADHWT_MASK;
|
SIM->SOPT1 |= ((uint32_t)TriggerType << SIM_SOPT1_ADHWT_SHIFT);
|
}
|
|
/**
|
* @brief UART0¶Ë¿ÚÒý½ÅÑ¡Ôñ 20190729XU
|
* @param PinSelect: Òý½ÅÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg UART0_PS_PTB0_PTB1: UART0_RXºÍUART0_TX·Ö±ðÓ³Éäµ½PTB0ºÍPTB1ÉÏ
|
* @arg UART0_PS_PTA2_PTA3: UART0_RXºÍUART0_TX·Ö±ðÓ³Éäµ½PTA2ºÍPTA3ÉÏ
|
* @arg UART0_PS_PTC2_PTC3: UART0_RXºÍUART0_TX·Ö±ðÓ³Éäµ½PTC2ºÍPTC3ÉÏ
|
* @retval None
|
*/
|
void SIM_PINSEL_UART0(uint8_t PinSelect)
|
{
|
SIM->PINSEL0 &= ~SIM_PINSEL0_UART0PS_MASK;
|
SIM->PINSEL0 |= ((uint32_t)PinSelect << SIM_PINSEL0_UART0PS_SHIFT);
|
}
|
|
/**
|
* @brief FTM0ͨµÀ0¶Ë¿ÚÒý½ÅÑ¡Ôñ
|
* @param PinSelect: Òý½ÅÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg FTM0CH0_PS_PTA0: FTM0_CH0ͨµÀÓ³Éäµ½PTA0ÉÏ
|
* @arg FTM0CH0_PS_PTB2: FTM0_CH0ͨµÀÓ³Éäµ½PTB2ÉÏ
|
* @arg FTM0CH0_PS_PTE5: FTM0_CH0ͨµÀÓ³Éäµ½PTE5ÉÏ
|
* @arg FTM0CH0_PS_PTF4: FTM0_CH0ͨµÀÓ³Éäµ½PTF4ÉÏ
|
* @retval None
|
*/
|
void SIM_PINSEL_FTM0CH0(uint8_t PinSelect)
|
{
|
SIM->PINSEL0 &= ~SIM_PINSEL0_FTM0PS0_MASK;
|
SIM->PINSEL0 |= ((uint32_t)PinSelect << SIM_PINSEL0_FTM0PS0_SHIFT);
|
}
|
|
/**
|
* @brief FTM0ͨµÀ1¶Ë¿ÚÒý½ÅÑ¡Ôñ
|
* @param PinSelect: Òý½ÅÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg FTM0CH1_PS_PTA1: FTM0_CH1ͨµÀÓ³Éäµ½PTA1ÉÏ
|
* @arg FTM0CH1_PS_PTB3: FTM0_CH1ͨµÀÓ³Éäµ½PTB3ÉÏ
|
* @arg FTM0CH1_PS_PTE6: FTM0_CH1ͨµÀÓ³Éäµ½PTE6ÉÏ
|
* @arg FTM0CH1_PS_PTF5: FTM0_CH1ͨµÀÓ³Éäµ½PTF5ÉÏ
|
* @retval None
|
*/
|
void SIM_PINSEL_FTM0CH1(uint8_t PinSelect)
|
{
|
SIM->PINSEL0 &= ~SIM_PINSEL0_FTM0PS1_MASK;
|
SIM->PINSEL0 |= ((uint32_t)PinSelect << SIM_PINSEL0_FTM0PS1_SHIFT);
|
}
|
|
/**
|
* @brief FTM1ͨµÀ0¶Ë¿ÚÒý½ÅÑ¡Ôñ
|
* @param PinSelect: Òý½ÅÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg FTM1CH0_PS_PTC4: FTM1_CH0ͨµÀÓ³Éäµ½PTC4ÉÏ
|
* @arg FTM1CH0_PS_PTH2: FTM1_CH0ͨµÀÓ³Éäµ½PTH2ÉÏ
|
* @arg FTM1CH0_PS_PTE5: FTM1_CH0ͨµÀÓ³Éäµ½PTE5ÉÏ
|
* @retval None
|
*/
|
void SIM_PINSEL_FTM1CH0(uint8_t PinSelect)
|
{
|
SIM->PINSEL0 &= ~SIM_PINSEL0_FTM1PS0_MASK;
|
SIM->PINSEL0 |= ((uint32_t)PinSelect << SIM_PINSEL0_FTM1PS0_SHIFT);
|
}
|
|
/**
|
* @brief FTM1ͨµÀ1¶Ë¿ÚÒý½ÅÑ¡Ôñ
|
* @param PinSelect: Òý½ÅÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg FTM1CH1_PS_PTC5: FTM1_CH1ͨµÀÓ³Éäµ½PTC5ÉÏ
|
* @arg FTM1CH1_PS_PTE7: FTM1_CH1ͨµÀÓ³Éäµ½PTE7ÉÏ
|
* @arg FTM1CH1_PS_PTE6: FTM1_CH1ͨµÀÓ³Éäµ½PTE6ÉÏ
|
* @retval None
|
*/
|
void SIM_PINSEL_FTM1CH1(uint8_t PinSelect)
|
{
|
SIM->PINSEL0 &= ~SIM_PINSEL0_FTM1PS1_MASK;
|
SIM->PINSEL0 |= ((uint32_t)PinSelect << SIM_PINSEL0_FTM1PS1_SHIFT);
|
}
|
|
/**
|
* @brief FTM_FLT2Òý½ÅÑ¡Ôñ
|
* @param PinSelect: Òý½ÅÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg FTM_FLT2_PS_PTA7: FTM_FLT2ͨµÀÓ³Éäµ½PTA7
|
* @arg FTM_FLT2_PS_PTI1: FTM_FLT2ͨµÀÓ³Éäµ½PTI1
|
* @arg FTM_FLT2_PS_PTF7: FTM_FLT2ͨµÀÓ³Éäµ½PTF7
|
* @arg FTM_FLT2_PS_PTF6: FTM_FLT2ͨµÀÓ³Éäµ½PTF6
|
* @retval None
|
*/
|
void SIM_PINSEL_FTMFLT2(uint8_t PinSelect)
|
{
|
SIM->PINSEL0 &= ~SIM_PINSEL0_FTMFLT2PS_MASK;
|
SIM->PINSEL0 |= ((uint32_t)PinSelect << SIM_PINSEL0_FTMFLT2PS_SHIFT);
|
}
|
|
/**
|
* @brief FTM_FLT1Òý½ÅÑ¡Ôñ
|
* @param PinSelect: Òý½ÅÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg FTM_FLT1_PS_PTA6: FTM_FLT1ͨµÀÓ³Éäµ½PTA7
|
* @arg FTM_FLT2_PS_PTI1: FTM_FLT1ͨµÀÓ³Éäµ½PTI1
|
* @arg FTM_FLT2_PS_PTF7: FTM_FLT1ͨµÀÓ³Éäµ½PTF7
|
* @arg FTM_FLT2_PS_PTF6: FTM_FLT1ͨµÀÓ³Éäµ½PTF6
|
* @retval None
|
*/
|
void SIM_PINSEL_FTMFLT1(uint8_t PinSelect)
|
{
|
SIM->PINSEL0 &= ~SIM_PINSEL0_FTMFLT1PS_MASK;
|
SIM->PINSEL0 |= ((uint32_t)PinSelect << SIM_PINSEL0_FTMFLT1PS_SHIFT);
|
}
|
|
/**
|
* @brief BUSOUTÊä³öÒý½ÅÑ¡Ôñ
|
* @param PinSelect: Òý½ÅÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg BUSOUT_PS_PTH2: BUSOUTͨµÀÓ³Éäµ½PTH2
|
* @arg BUSOUT_PS_PTH6: BUSOUTͨµÀÓ³Éäµ½PTH6
|
* @arg BUSOUT_PS_PTB5: BUSOUTͨµÀÓ³Éäµ½PTB5
|
* @retval None
|
*/
|
void SIM_PINSEL_BUSOUT(uint8_t PinSelect)
|
{
|
SIM->PINSEL0 &= ~SIM_PINSEL0_BUSOUTPS_MASK;
|
SIM->PINSEL0 |= ((uint32_t)PinSelect << SIM_PINSEL0_BUSOUTPS_SHIFT);
|
}
|
|
/**
|
* @brief TCLK2Òý½ÅÑ¡Ôñ
|
* @param PinSelect: Òý½ÅÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg TCLK2_PS_PTE7: TCLK2Ñ¡ÔñÒý½ÅPTE7
|
* @arg TCLK2_PS_PTH7: TCLK2Ñ¡ÔñÒý½ÅPTH7
|
* @arg TCLK2_PS_PTD5: TCLK2Ñ¡ÔñÒý½ÅPTD5
|
* @retval None
|
*/
|
void SIM_PINSEL_TCLK2(uint8_t PinSelect)
|
{
|
SIM->PINSEL0 &= ~SIM_PINSEL0_TCLK2PS_MASK;
|
SIM->PINSEL0 |= ((uint32_t)PinSelect << SIM_PINSEL0_TCLK2PS_SHIFT);
|
}
|
|
/**
|
* @brief TCLK1Òý½ÅÑ¡Ôñ
|
* @param PinSelect: Òý½ÅÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg TCLK1_PS_PTE0: TCLK1Ñ¡ÔñÒý½ÅPTE0
|
* @arg TCLK1_PS_PTH7: TCLK1Ñ¡ÔñÒý½ÅPTH7
|
* @arg TCLK1_PS_PTD5: TCLK1Ñ¡ÔñÒý½ÅPTD5
|
* @retval None
|
*/
|
void SIM_PINSEL_TCLK1(uint8_t PinSelect)
|
{
|
SIM->PINSEL0 &= ~SIM_PINSEL0_TCLK1PS_MASK;
|
SIM->PINSEL0 |= ((uint32_t)PinSelect << SIM_PINSEL0_TCLK1PS_SHIFT);
|
}
|
|
/**
|
* @brief TCLK0Òý½ÅÑ¡Ôñ
|
* @param PinSelect: Òý½ÅÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg TCLK0_PS_PTA5: TCLK0Ñ¡ÔñÒý½ÅPTA5
|
* @arg TCLK0_PS_PTH7: TCLK0Ñ¡ÔñÒý½ÅPTH7
|
* @arg TCLK0_PS_PTD5: TCLK0Ñ¡ÔñÒý½ÅPTD5
|
* @retval None
|
*/
|
void SIM_PINSEL_TCLK0(uint8_t PinSelect)
|
{
|
SIM->PINSEL0 &= ~SIM_PINSEL0_TCLK0PS_MASK;
|
SIM->PINSEL0 |= ((uint32_t)PinSelect << SIM_PINSEL0_TCLK0PS_SHIFT);
|
}
|
|
/**
|
* @brief FTM0TCLKÒý½ÅÑ¡Ôñ
|
* @param PinSelect: Òý½ÅÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg FTM0CLK_PS_TCLK0: Ñ¡ÔñTCLK0ÓÃÓÚFTM0Ä£¿é
|
* @arg FTM0CLK_PS_TCLK1: Ñ¡ÔñTCLK1ÓÃÓÚFTM0Ä£¿é
|
* @arg FTM0CLK_PS_TCLK2: Ñ¡ÔñTCLK2ÓÃÓÚFTM0Ä£¿é
|
* @retval None
|
*/
|
void SIM_PINSEL_FTM0TCLK(uint8_t PinSelect)
|
{
|
SIM->PINSEL0 &= ~SIM_PINSEL0_FTM0CLKPS_MASK;
|
SIM->PINSEL0 |= ((uint32_t)PinSelect << SIM_PINSEL0_FTM0CLKPS_SHIFT);
|
}
|
|
/**
|
* @brief FTM1TCLKÒý½ÅÑ¡Ôñ
|
* @param PinSelect: Òý½ÅÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg FTM1CLK_PS_TCLK0: Ñ¡ÔñTCLK0ÓÃÓÚFTM1Ä£¿é
|
* @arg FTM1CLK_PS_TCLK1: Ñ¡ÔñTCLK1ÓÃÓÚFTM1Ä£¿é
|
* @arg FTM1CLK_PS_TCLK2: Ñ¡ÔñTCLK2ÓÃÓÚFTM1Ä£¿é
|
* @retval None
|
*/
|
void SIM_PINSEL_FTM1TCLK(uint8_t PinSelect)
|
{
|
SIM->PINSEL0 &= ~SIM_PINSEL0_FTM1CLKPS_MASK;
|
SIM->PINSEL0 |= ((uint32_t)PinSelect << SIM_PINSEL0_FTM1CLKPS_SHIFT);
|
}
|
|
/**
|
* @brief FTM2TCLKÒý½ÅÑ¡Ôñ
|
* @param PinSelect: Òý½ÅÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg FTM2CLK_PS_TCLK0: Ñ¡ÔñTCLK0ÓÃÓÚFTM2Ä£¿é
|
* @arg FTM2CLK_PS_TCLK1: Ñ¡ÔñTCLK1ÓÃÓÚFTM2Ä£¿é
|
* @arg FTM2CLK_PS_TCLK2: Ñ¡ÔñTCLK2ÓÃÓÚFTM2Ä£¿é
|
* @retval None
|
*/
|
void SIM_PINSEL_FTM2TCLK(uint8_t PinSelect)
|
{
|
SIM->PINSEL0 &= ~SIM_PINSEL0_FTM2CLKPS_MASK;
|
SIM->PINSEL0 |= ((uint32_t)PinSelect << SIM_PINSEL0_FTM2CLKPS_SHIFT);
|
}
|
|
/**
|
* @brief PWTCLKÒý½ÅÑ¡Ôñ
|
* @param PinSelect: Òý½ÅÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg PWTCLK_PS_TCLK0: Ñ¡ÔñTCLK0ÓÃÓÚPWTÄ£¿é
|
* @arg PWTCLK_PS_TCLK1: Ñ¡ÔñTCLK1ÓÃÓÚPWTÄ£¿é
|
* @arg PWTCLK_PS_TCLK2: Ñ¡ÔñTCLK2ÓÃÓÚPWTÄ£¿é
|
* @retval None
|
*/
|
void SIM_PINSEL_PWTTCLK(uint8_t PinSelect)
|
{
|
SIM->PINSEL0 &= ~SIM_PINSEL0_PWTCLKPS_MASK;
|
SIM->PINSEL0 |= ((uint32_t)PinSelect << SIM_PINSEL0_PWTCLKPS_SHIFT);
|
}
|
|
/**
|
* @brief FTM2ͨµÀ0¶Ë¿ÚÒý½ÅÑ¡Ôñ
|
* @param PinSelect: Òý½ÅÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg FTM2CH0_PS_PTC0: FTM2_CH0ͨµÀÓ³Éäµ½PTC0ÉÏ
|
* @arg FTM2CH0_PS_PTH0: FTM2_CH0ͨµÀÓ³Éäµ½PTH0ÉÏ
|
* @arg FTM2CH0_PS_PTF0: FTM2_CH0ͨµÀÓ³Éäµ½PTF0ÉÏ
|
* @retval None
|
*/
|
void SIM_PINSEL_FTM2CH0(uint8_t PinSelect)
|
{
|
SIM->PINSEL1 &= ~SIM_PINSEL1_FTM2PS0_MASK;
|
SIM->PINSEL1 |= (uint32_t)PinSelect;
|
}
|
|
/**
|
* @brief FTM2ͨµÀ1¶Ë¿ÚÒý½ÅÑ¡Ôñ
|
* @param PinSelect: Òý½ÅÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg FTM2CH1_PS_PTC1: FTM2_CH1ͨµÀÓ³Éäµ½PTC1ÉÏ
|
* @arg FTM2CH1_PS_PTH1: FTM2_CH1ͨµÀÓ³Éäµ½PTH1ÉÏ
|
* @arg FTM2CH1_PS_PTF1: FTM2_CH1ͨµÀÓ³Éäµ½PTF1ÉÏ
|
* @retval None
|
*/
|
void SIM_PINSEL_FTM2CH1(uint8_t PinSelect)
|
{
|
SIM->PINSEL1 &= ~SIM_PINSEL1_FTM2PS1_MASK;
|
SIM->PINSEL1 |= ((uint32_t)PinSelect << SIM_PINSEL1_FTM2PS1_SHIFT);
|
}
|
|
/**
|
* @brief FTM2ͨµÀ2¶Ë¿ÚÒý½ÅÑ¡Ôñ
|
* @param PinSelect: Òý½ÅÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg FTM2CH2_PS_PTC2: FTM2_CH2ͨµÀÓ³Éäµ½PTC2ÉÏ
|
* @arg FTM2CH2_PS_PTD0: FTM2_CH2ͨµÀÓ³Éäµ½PTD0ÉÏ
|
* @arg FTM2CH2_PS_PTG4: FTM2_CH2ͨµÀÓ³Éäµ½PTG4ÉÏ
|
* @retval None
|
*/
|
void SIM_PINSEL_FTM2CH2(uint8_t PinSelect)
|
{
|
SIM->PINSEL1 &= ~SIM_PINSEL1_FTM2PS2_MASK;
|
SIM->PINSEL1 |= ((uint32_t)PinSelect << SIM_PINSEL1_FTM2PS2_SHIFT);
|
}
|
|
/**
|
* @brief FTM2ͨµÀ3¶Ë¿ÚÒý½ÅÑ¡Ôñ
|
* @param PinSelect: Òý½ÅÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg FTM2CH3_PS_PTC3: FTM2_CH3ͨµÀÓ³Éäµ½PTC3ÉÏ
|
* @arg FTM2CH3_PS_PTD1: FTM2_CH3ͨµÀÓ³Éäµ½PTD1ÉÏ
|
* @arg FTM2CH3_PS_PTG5: FTM2_CH3ͨµÀÓ³Éäµ½PTG5ÉÏ
|
* @retval None
|
*/
|
void SIM_PINSEL_FTM2CH3(uint8_t PinSelect)
|
{
|
SIM->PINSEL1 &= ~SIM_PINSEL1_FTM2PS3_MASK;
|
SIM->PINSEL1 |= ((uint32_t)PinSelect << SIM_PINSEL1_FTM2PS3_SHIFT);
|
}
|
|
/**
|
* @brief FTM2ͨµÀ4¶Ë¿ÚÒý½ÅÑ¡Ôñ
|
* @param PinSelect: Òý½ÅÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg FTM2CH4_PS_PTB4: FTM2_CH4ͨµÀÓ³Éäµ½PTB4ÉÏ
|
* @arg FTM2CH4_PS_PTG6: FTM2_CH4ͨµÀÓ³Éäµ½PTG6ÉÏ
|
* @retval None
|
*/
|
void SIM_PINSEL_FTM2CH4(uint8_t PinSelect)
|
{
|
SIM->PINSEL1 &= ~SIM_PINSEL1_FTM2PS4_MASK;
|
SIM->PINSEL1 |= ((uint32_t)PinSelect << SIM_PINSEL1_FTM2PS4_SHIFT);
|
}
|
|
/**
|
* @brief FTM2ͨµÀ5¶Ë¿ÚÒý½ÅÑ¡Ôñ
|
* @param PinSelect: Òý½ÅÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg FTM2CH5_PS_PTB5: FTM2_CH5ͨµÀÓ³Éäµ½PTB5ÉÏ
|
* @arg FTM2CH5_PS_PTG7: FTM2_CH5ͨµÀÓ³Éäµ½PTG7ÉÏ
|
* @retval None
|
*/
|
void SIM_PINSEL_FTM2CH5(uint8_t PinSelect)
|
{
|
SIM->PINSEL1 &= ~SIM_PINSEL1_FTM2PS5_MASK;
|
SIM->PINSEL1 |= ((uint32_t)PinSelect << SIM_PINSEL1_FTM2PS5_SHIFT);
|
}
|
|
/**
|
* @brief I2C1¶Ë¿ÚÒý½ÅÑ¡Ôñ
|
* @param PinSelect: Òý½ÅÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg I2C1_PS_PTE1_PTE0: I2C1_SCLºÍI2C1_SDA·Ö±ðÓ³Éäµ½PTE1ºÍPTE0ÉÏ
|
* @arg I2C1_PS_PTH4_PTH3: I2C1_SCLºÍI2C1_SDA·Ö±ðÓ³Éäµ½PTH4ºÍPTH3ÉÏ
|
* @retval None
|
*/
|
void SIM_PINSEL_I2C1(uint8_t PinSelect)
|
{
|
SIM->PINSEL1 &= ~SIM_PINSEL1_I2C1PS_MASK;
|
SIM->PINSEL1 |= ((uint32_t)PinSelect << SIM_PINSEL1_I2C1PS_SHIFT);
|
}
|
|
/**
|
* @brief SPI1¶Ë¿ÚÒý½ÅÑ¡Ôñ
|
* @param PinSelect: Òý½ÅÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg SPI1_PS_PTD0_PTD1_PTD2_PTD3: SPI0_SCK,SPI0_MOSI,SPI0_MISOºÍSPI0_CS·Ö±ðÓ³Éäµ½PTD0,PTD1,PTD2ºÍPTD3ÉÏ
|
* @arg SPI1_PS_PTG4_PTG5_PTG6_PTG7: SPI0_SCK,SPI0_MOSI,SPI0_MISOºÍSPI0_CS·Ö±ðÓ³Éäµ½PTG4,PTG5,PTG6ºÍPTG7ÉÏ
|
* @retval None
|
*/
|
void SIM_PINSEL_SPI1(uint8_t PinSelect)
|
{
|
SIM->PINSEL1 &= ~SIM_PINSEL1_SPI1PS_MASK;
|
SIM->PINSEL1 |= ((uint32_t)PinSelect << SIM_PINSEL1_SPI1PS_SHIFT);
|
}
|
|
/**
|
* @brief UART1¶Ë¿ÚÒý½ÅÑ¡Ôñ
|
* @param PinSelect: Òý½ÅÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg UART1_PS_PTC7_PTC6: UART0_RXºÍUART0_TX·Ö±ðÓ³Éäµ½PTC7ºÍPTC6ÉÏ
|
* @arg UART1_PS_PTF3_PTF2: UART0_RXºÍUART0_TX·Ö±ðÓ³Éäµ½PTF3ºÍPTF2ÉÏ
|
* @retval None
|
*/
|
void SIM_PINSEL_UART1(uint8_t PinSelect)
|
{
|
SIM->PINSEL1 &= ~SIM_PINSEL1_UART1PS_MASK;
|
SIM->PINSEL1 |= ((uint32_t)PinSelect << SIM_PINSEL1_UART1PS_SHIFT);
|
}
|
|
/**
|
* @brief UART2¶Ë¿ÚÒý½ÅÑ¡Ôñ
|
* @param PinSelect: Òý½ÅÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg UART2_PS_PTD7_PTD6: UART0_RXºÍUART0_TX·Ö±ðÓ³Éäµ½PTD7ºÍPTD6ÉÏ
|
* @arg UART2_PS_PTI1_PTI0: UART0_RXºÍUART0_TX·Ö±ðÓ³Éäµ½PTI1ºÍPTI0ÉÏ
|
* @retval None
|
*/
|
void SIM_PINSEL_UART2(uint8_t PinSelect)
|
{
|
SIM->PINSEL1 &= ~SIM_PINSEL1_UART2PS_MASK;
|
SIM->PINSEL1 |= ((uint32_t)PinSelect << SIM_PINSEL1_UART2PS_SHIFT);
|
}
|
|
/**
|
* @brief PWTIN0¶Ë¿ÚÒý½ÅÑ¡Ôñ
|
* @param PinSelect: Òý½ÅÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg PWTIN0_PS_PTD5: PWTIN0Òý½ÅÓ³Éäµ½PTD5ÉÏ
|
* @arg PWTIN0_PS_PTE2: PWTIN0Òý½ÅÓ³Éäµ½PTE2ÉÏ
|
* @retval None
|
*/
|
void SIM_PINSEL_PWTIN0(uint8_t PinSelect)
|
{
|
SIM->PINSEL1 &= ~SIM_PINSEL1_PWTIN0PS_MASK;
|
SIM->PINSEL1 |= ((uint32_t)PinSelect << SIM_PINSEL1_PWTIN0PS_SHIFT);
|
}
|
|
/**
|
* @brief PWTIN1¶Ë¿ÚÒý½ÅÑ¡Ôñ
|
* @param PinSelect: Òý½ÅÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg PWTIN1_PS_PTB0: PWTIN0Òý½ÅÓ³Éäµ½PTB0ÉÏ
|
* @arg PWTIN1_PS_PTH7: PWTIN0Òý½ÅÓ³Éäµ½PTH7ÉÏ
|
* @retval None
|
*/
|
void SIM_PINSEL_PWTIN1(uint8_t PinSelect)
|
{
|
SIM->PINSEL1 &= ~SIM_PINSEL1_PWTIN1PS_MASK;
|
SIM->PINSEL1 |= ((uint32_t)PinSelect << SIM_PINSEL1_PWTIN1PS_SHIFT);
|
}
|
|
/**
|
* @brief SPI0¶Ë¿ÚÒý½ÅÑ¡Ôñ 20190729XU
|
* @param PinSelect: Òý½ÅÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg SPI0_PS_PTB2_PTB3_PTB4_PTB5: SPI0_SCK,SPI0_MOSI,SPI0_MISOºÍSPI0_CS·Ö±ðÓ³Éäµ½PTB2,PTB3,PTB4ºÍPTB5ÉÏ
|
* @arg SPI0_PS_PTE0_PTE1_PTE2_PTE3: SPI0_SCK,SPI0_MOSI,SPI0_MISOºÍSPI0_CS·Ö±ðÓ³Éäµ½PTE0,PTE1,PTE2ºÍPTE3ÉÏ
|
* @retval None
|
*/
|
void SIM_PINSEL_SPI0(uint8_t PinSelect)
|
{
|
SIM->PINSEL1 &= ~SIM_PINSEL1_SPI0PS_MASK;
|
SIM->PINSEL1 |= ((uint32_t)PinSelect << SIM_PINSEL1_SPI0PS_SHIFT);
|
}
|
|
/**
|
* @brief EWM¶Ë¿ÚÒý½ÅÑ¡Ôñ
|
* @param PinSelect: Òý½ÅÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg EWM_PS_PTA3_PTA2: EWM_INºÍEWM_RESET·Ö±ðÓ³Éäµ½PTA3ºÍPTA2ÉÏ
|
* @arg EWM_PS_PTC4_PTA4: EWM_INºÍEWM_RESET·Ö±ðÓ³Éäµ½PTC4ºÍPTA4ÉÏ
|
* @arg EWM_PS_PTE7_PTH2: EWM_INºÍEWM_RESET·Ö±ðÓ³Éäµ½PTE7ºÍPTH2ÉÏ
|
* @retval None
|
*/
|
void SIM_PINSEL_EWM(uint8_t PinSelect)
|
{
|
SIM->PINSEL1 &= ~SIM_PINSEL1_EWMPS_MASK;
|
SIM->PINSEL1 |= ((uint32_t)PinSelect << SIM_PINSEL1_EWMPS_SHIFT);
|
}
|
|
/**
|
* @brief IRQ¶Ë¿ÚÒý½ÅÑ¡Ôñ 20190729XU
|
* @param PinSelect: Òý½ÅÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg IRQ_PS_GROUP1: IRQÓ³Éäµ½µÚÒ»×éPIN½ÅÉÏ
|
* @arg IRQ_PS_GROUP2: IRQÓ³Éäµ½µÚ¶þ×éPIN½ÅÉÏ
|
* @arg IRQ_PS_GROUP3: IRQÓ³Éäµ½µÚÈý×éPIN½ÅÉÏ
|
* @arg IRQ_PS_GROUP4: IRQÓ³Éäµ½µÚËÄ×éPIN½ÅÉÏ
|
* @arg IRQ_PS_GROUP5: IRQÓ³Éäµ½µÚÎå×éPIN½ÅÉÏ
|
* @retval None
|
*/
|
void SIM_PINSEL_IRQ(uint8_t PinSelect)
|
{
|
SIM->PINSEL1 &= ~SIM_PINSEL1_IRQPS_MASK;
|
SIM->PINSEL1 |= ((uint32_t)PinSelect << SIM_PINSEL1_IRQPS_SHIFT);
|
}
|
|
/**
|
* @brief ACMP1Êä³öPS¶Ë¿ÚÒý½ÅÑ¡Ôñ 20190729XU
|
* @param PinSelect: Òý½ÅÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg ACMP1_PS_PTB5: ACMP1Êä³öÓ³Éäµ½PTB5ÉÏ
|
* @arg ACMP1_PS_PTI1: ACMP1Êä³öÓ³Éäµ½PTI1ÉÏ
|
* @retval None
|
*/
|
void SIM_PINSEL_ACMP(uint8_t PinSelect)
|
{
|
SIM->PINSEL1 &= ~SIM_PINSEL1_ACMP1PS_MASK;
|
SIM->PINSEL1 |= ((uint32_t)PinSelect << SIM_PINSEL1_ACMP1PS_SHIFT);
|
}
|
|
/**
|
* @brief RTCÊä³öPS¶Ë¿ÚÒý½ÅÑ¡Ôñ 20190729XU
|
* @param PinSelect: Òý½ÅÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg RTCO_PS_PTC4: RTCÊä³öÓ³Éäµ½PTC4ÉÏ
|
* @arg RTCO_PS_PTC5: RTCÊä³öÓ³Éäµ½PTC5ÉÏ
|
* @retval None
|
*/
|
void SIM_PINSEL_RTC(uint8_t PinSelect)
|
{
|
SIM->PINSEL1 &= ~SIM_PINSEL1_RTCPS_MASK;
|
SIM->PINSEL1 |= ((uint32_t)PinSelect << SIM_PINSEL1_RTCPS_SHIFT);
|
}
|
|
/**
|
* @brief I2C0¶Ë¿ÚÒý½ÅÑ¡Ôñ 20190729XU
|
* @param PinSelect: Òý½ÅÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg I2C0_PS_PTA3_PTA2: I2C0_SCLºÍI2C0_SDA·Ö±ðÓ³Éäµ½PTA3ºÍPTA2ÉÏ
|
* @arg I2C0_PS_PTB7_PTB6: I2C0_SCLºÍI2C0_SDA·Ö±ðÓ³Éäµ½PTB7ºÍPTB6ÉÏ
|
* @retval None
|
*/
|
void SIM_PINSEL_I2C0(uint8_t PinSelect)
|
{
|
SIM->PINSEL1 &= ~SIM_PINSEL1_I2C0PS_MASK;
|
SIM->PINSEL1 |= ((uint32_t)PinSelect << SIM_PINSEL1_I2C0PS_SHIFT);
|
}
|
|
/**
|
* @brief FTM0ͨµÀ2¶Ë¿ÚÒý½ÅÑ¡Ôñ
|
* @param PinSelect: Òý½ÅÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg FTM0CH2_PS_PTH7: FTM0_CH2ͨµÀÓ³Éäµ½PTH7ÉÏ
|
* @arg FTM0CH2_PS_PTD5: FTM0_CH2ͨµÀÓ³Éäµ½PTD5ÉÏ
|
* @retval None
|
*/
|
void SIM_PINSEL_FTM0CH2(uint8_t PinSelect)
|
{
|
SIM->PINSEL1 &= ~SIM_PINSEL1_FTM0PS2_MASK;
|
SIM->PINSEL1 |= ((uint32_t)PinSelect << SIM_PINSEL1_FTM0PS2_SHIFT);
|
}
|
|
/**
|
* @brief FTM0ͨµÀ3¶Ë¿ÚÒý½ÅÑ¡Ôñ
|
* @param PinSelect: Òý½ÅÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg FTM0CH3_PS_PTE4: FTM0_CH3ͨµÀÓ³Éäµ½PTE4ÉÏ
|
* @arg FTM0CH3_PS_PTD4: FTM0_CH3ͨµÀÓ³Éäµ½PTD4ÉÏ
|
* @retval None
|
*/
|
void SIM_PINSEL_FTM0CH3(uint8_t PinSelect)
|
{
|
SIM->PINSEL1 &= ~SIM_PINSEL1_FTM0PS3_MASK;
|
SIM->PINSEL1 |= ((uint32_t)PinSelect << SIM_PINSEL1_FTM0PS3_SHIFT);
|
}
|
|
/**
|
* @brief FTM1ͨµÀ2¶Ë¿ÚÒý½ÅÑ¡Ôñ
|
* @param PinSelect: Òý½ÅÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg FTM1CH2_PS_PTH1: FTM1_CH2ͨµÀÓ³Éäµ½PTH1ÉÏ
|
* @arg FTM1CH2_PS_PTB4: FTM1_CH2ͨµÀÓ³Éäµ½PTB4ÉÏ
|
* @retval None
|
*/
|
void SIM_PINSEL_FTM1CH2(uint8_t PinSelect)
|
{
|
SIM->PINSEL1 &= ~SIM_PINSEL1_FTM1PS2_MASK;
|
SIM->PINSEL1 |= ((uint32_t)PinSelect << SIM_PINSEL1_FTM1PS2_SHIFT);
|
}
|
|
/**
|
* @brief FTM1ͨµÀ3¶Ë¿ÚÒý½ÅÑ¡Ôñ
|
* @param PinSelect: Òý½ÅÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg FTM1CH3_PS_PTH0: FTM1_CH3ͨµÀÓ³Éäµ½PTE4ÉÏ
|
* @arg FTM1CH3_PS_PTE3: FTM1_CH3ͨµÀÓ³Éäµ½PTD4ÉÏ
|
* @retval None
|
*/
|
void SIM_PINSEL_FTM1CH3(uint8_t PinSelect)
|
{
|
SIM->PINSEL1 &= ~SIM_PINSEL1_FTM1PS3_MASK;
|
SIM->PINSEL1 |= ((uint32_t)PinSelect << SIM_PINSEL1_FTM1PS3_SHIFT);
|
}
|
|
/**
|
* @brief FTM2ͨµÀ6¶Ë¿ÚÒý½ÅÑ¡Ôñ
|
* @param PinSelect: Òý½ÅÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg FTM2CH6_PS_PTF3: FTM2_CH6ͨµÀÓ³Éäµ½PTF3ÉÏ
|
* @arg FTM2CH6_PS_PTD3: FTM2_CH6ͨµÀÓ³Éäµ½PTD3ÉÏ
|
* @retval None
|
*/
|
void SIM_PINSEL_FTM2CH6(uint8_t PinSelect)
|
{
|
SIM->PINSEL1 &= ~SIM_PINSEL1_FTM2PS6_MASK;
|
SIM->PINSEL1 |= ((uint32_t)PinSelect << SIM_PINSEL1_FTM2PS6_SHIFT);
|
}
|
|
/**
|
* @brief FTM2ͨµÀ7¶Ë¿ÚÒý½ÅÑ¡Ôñ
|
* @param PinSelect: Òý½ÅÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg FTM2CH7_PS_PTF2: FTM2_CH7ͨµÀÓ³Éäµ½PTF2ÉÏ
|
* @arg FTM2CH7_PS_PTD2: FTM2_CH7ͨµÀÓ³Éäµ½PTD2ÉÏ
|
* @retval None
|
*/
|
void SIM_PINSEL_FTM2CH7(uint8_t PinSelect)
|
{
|
SIM->PINSEL1 &= ~SIM_PINSEL1_FTM2PS7_MASK;
|
SIM->PINSEL1 |= ((uint32_t)PinSelect << SIM_PINSEL1_FTM2PS7_SHIFT);
|
}
|
|
/**
|
* @brief ϵͳʱÖÓѡͨ
|
* @param SCGC_Type: Ö¸¶¨ÍâÉèʱÖÓʹÄÜ״̬
|
* Õâ¸ö²ÎÊý¿ÉÒÔΪÒÔÏÂÖµ:
|
* @arg SIM_SCGC_RTC: RTCʱÖÓѡͨ
|
* @arg SIM_SCGC_PIT: PITʱÖÓѡͨ
|
* @arg SIM_SCGC_EWM: EWMʱÖÓѡͨ
|
* @arg SIM_SCGC_PWT: PWTʱÖÓѡͨ
|
* @arg SIM_SCGC_FTM0: FTM0ʱÖÓѡͨ
|
* @arg SIM_SCGC_FTM1: FTM1ʱÖÓѡͨ
|
* @arg SIM_SCGC_FTM2: FTM2ʱÖÓѡͨ
|
* @arg SIM_SCGC_CLMA: FTM2ʱÖÓѡͨ
|
* @arg SIM_SCGC_CLMB: FTM2ʱÖÓѡͨ
|
* @arg SIM_SCGC_CRC: CRCʱÖÓѡͨ
|
* @arg SIM_SCGC_WDG: WDGʱÖÓѡͨ
|
* @arg SIM_SCGC_MCAN: MCANʱÖÓѡͨ
|
* @arg SIM_SCGC_I2C0: I2C0ʱÖÓѡͨ
|
* @arg SIM_SCGC_I2C1: I2C1ʱÖÓѡͨ
|
* @arg SIM_SCGC_SPI0: SPI0ʱÖÓѡͨ
|
* @arg SIM_SCGC_SPI1: SPI1ʱÖÓѡͨ
|
* @arg SIM_SCGC_UART0: UART0ʱÖÓѡͨ
|
* @arg SIM_SCGC_UART1: UART1ʱÖÓѡͨ
|
* @arg SIM_SCGC_UART2: UART2ʱÖÓѡͨ
|
* @arg SIM_SCGC_KBI0: KBI0ʱÖÓѡͨ
|
* @arg SIM_SCGC_KBI1: KBI1ʱÖÓѡͨ
|
* @arg SIM_SCGC_IRQ: IRQʱÖÓѡͨ
|
* @arg SIM_SCGC_DMA: DMAʱÖÓѡͨ
|
* @arg SIM_SCGC_ADC: ADCʱÖÓѡͨ
|
* @arg SIM_SCGC_ACMP0: ACMP0ʱÖÓѡͨ
|
* @arg SIM_SCGC_ACMP1: ACMP1ʱÖÓѡͨ
|
* @param State: Ñ¡¶¨Ö¸¶¨µÄÍâÉè
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg ENABLE: ʹÄÜÏàӦģ¿é
|
* @arg DISABLE: ¹Ø±ÕÏàӦģ¿é
|
* @retval None
|
*/
|
void SIM_SCGC_Cmd(uint32_t SCGC_Type, FunctionalState State)
|
{
|
if(State == ENABLE)
|
{
|
SIM->SCGC |= SCGC_Type;
|
}
|
else
|
{
|
SIM->SCGC &= ~SCGC_Type;
|
}
|
}
|
|
/**
|
* @brief ϵͳʱÖÓѡͨ1
|
* @param SCGC_Type: Ö¸¶¨ÍâÉèʱÖÓʹÄÜ״̬
|
* Õâ¸ö²ÎÊý¿ÉÒÔΪÒÔÏÂÖµ:
|
* @arg SIM_SCGC1_FTM0F: FTM0Ñ¡ÓÃICSFFCLKʱÖÓʹÄÜ
|
* @arg SIM_SCGC1_FTM1F: FTM1Ñ¡ÓÃICSFFCLKʱÖÓʹÄÜ
|
* @arg SIM_SCGC1_FTM2F: FTM2Ñ¡ÓÃICSFFCLKʱÖÓʹÄÜ
|
* @arg SIM_SCGC1_RTCEC: RTCÑ¡ÓÃOSCERCLKʱÖÓʹÄÜ
|
* @arg SIM_SCGC1_ADCALTC: ADCÑ¡ÓÃALTCLKʱÖÓʹÄÜ
|
* @arg SIM_SCGC1_FTM0T: FTM0Ñ¡ÓÃTIMERCLKʱÖÓʹÄÜ
|
* @arg SIM_SCGC1_FTM1T: FTM1Ñ¡ÓÃTIMERCLKʱÖÓʹÄÜ
|
* @arg SIM_SCGC1_FTM2T: FTM2Ñ¡ÓÃTIMERCLKʱÖÓʹÄÜ
|
* @arg SIM_SCGC1_RTCLPOC: RTCÑ¡ÓÃLPOCLKʱÖÓʹÄÜ
|
* @param State: Ñ¡¶¨Ö¸¶¨µÄÍâÉè
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg ENABLE: ʹÄÜÏàӦģ¿é
|
* @arg DISABLE: ¹Ø±ÕÏàӦģ¿é
|
* @retval None
|
*/
|
void SIM_SCGC1_Cmd(uint32_t SCGC1_Type, FunctionalState State)
|
{
|
if(State == ENABLE)
|
{
|
SIM->SCGC1 |= SCGC1_Type;
|
}
|
else
|
{
|
SIM->SCGC1 &= ~SCGC1_Type;
|
}
|
}
|
|
/**
|
* @brief »ñȡͨÓÃΨһ±êʶ·ûµÍλ
|
* @param None
|
* @retval ͨÓÃΨһ±êʶ·ûµÍλ
|
*/
|
uint32_t SIM_GetUUIDL(void)
|
{
|
return SIM->UUIDL;
|
}
|
|
/**
|
* @brief »ñȡͨÓÃΨһ±êʶ·ûÖеÍλ
|
* @param None
|
* @retval ͨÓÃΨһ±êʶ·ûµÍλ
|
*/
|
uint32_t SIM_GetUUIDML(void)
|
{
|
return SIM->UUIDML;
|
}
|
|
/**
|
* @brief »ñȡͨÓÃΨһ±êʶ·ûÖиßλ
|
* @param None
|
* @retval ͨÓÃΨһ±êʶ·ûµÍλ
|
*/
|
uint32_t SIM_GetUUIDMH(void)
|
{
|
return SIM->UUIDMH;
|
}
|
|
/**
|
* @brief »ñȡоƬSRAMÈÝÁ¿´óС
|
* @param None
|
* @retval SRAMÈÝÁ¿´óС(SRAM_SIZE_16KB or SRAM_SIZE_24KB)
|
*/
|
uint8_t SIM_GetSRAMSize(void)
|
{
|
return (uint8_t)(SIM->UUIDMH & SIM_UUIDMH_SS_MASK);
|
}
|
|
/**
|
* @brief »ñȡоƬFLASHÈÝÁ¿´óС
|
* @param None
|
* @retval FLASHÈÝÁ¿´óС(FLASH_SIZE_256KB or FLASH_SIZE_128KB)
|
*/
|
uint8_t SIM_GetFLASHSize(void)
|
{
|
return (uint8_t)((SIM->UUIDMH & SIM_UUIDMH_FS_MASK) >> SIM_UUIDMH_FS_SHIFT);
|
}
|
|
/**
|
* @brief »ñȡоƬ°æ±¾
|
* @param None
|
* @retval оƬ°æ±¾
|
*/
|
uint8_t SIM_GetVer(void)
|
{
|
return (uint8_t)((SIM->UUIDMH & SIM_UUIDMH_VER_MASK) >> SIM_UUIDMH_VER_SHIFT);
|
}
|
|
/**
|
* @brief »ñȡоƬÐͺÅ
|
* @param None
|
* @retval оƬÐͺÅ
|
*/
|
uint8_t SIM_GetDevID(void)
|
{
|
return (uint8_t)((SIM->UUIDMH & SIM_UUIDMH_DEVID_MASK) >> SIM_UUIDMH_DEVID_SHIFT);
|
}
|
|
/**
|
* @brief ÉèÖÃÄÚºËʱÖӵķÖƵֵ
|
* @param divide: ÄÚºËʱÖÓ·ÖƵֵ(1-256)(ICSOUTCLK³ýÒÔdivide)
|
* @retval None
|
*/
|
void SIM_CLKDIV_OUTDIV1(uint32_t divide)
|
{
|
SIM->CLKDIV &= ~SIM_CLKDIV_OUTDIV1_MASK;
|
SIM->CLKDIV |= divide - (uint32_t)1;
|
}
|
|
/**
|
* @brief ÉèÖÃAHB×ÜÏߺÍFLASHʱÖӵķÖƵֵ
|
* @param divide: AHB×ÜÏߺÍFLASHʱÖӵķÖƵֵ(OUTDIV1³ýÒÔdivide) (1-256)
|
* @retval None
|
*/
|
void SIM_CLKDIV_OUTDIV2(uint32_t divide)
|
{
|
SIM->CLKDIV &= ~SIM_CLKDIV_OUTDIV2_MASK;
|
SIM->CLKDIV |= (divide - (uint32_t)1) << SIM_CLKDIV_OUTDIV2_SHIFT;
|
}
|
|
/**
|
* @brief ÉèÖÃAPB×ÜÏßʱÖӵķÖƵֵ
|
* @param divide: APB×ÜÏßʱÖӵķÖƵֵ(OUTDIV2³ýÒÔdivide)
|
* @retval None
|
*/
|
void SIM_CLKDIV_OUTDIV3(uint32_t divide)
|
{
|
SIM->CLKDIV &= ~SIM_CLKDIV_OUTDIV3_MASK;
|
SIM->CLKDIV |= (divide - (uint32_t)1) << SIM_CLKDIV_OUTDIV3_SHIFT;
|
}
|
|
/**
|
* @brief ÉèÖö¨Ê±Æ÷(FTM0,FTM1,FTM2,PWT)µÄ·ÖƵֵ
|
* @param divide: APB×ÜÏßʱÖӵķÖƵֵ(ICSOUTCLK³ýÒÔdivide)
|
* @retval None
|
*/
|
void SIM_CLKDIV_OUTDIV4(uint32_t divide)
|
{
|
SIM->CLKDIV &= ~SIM_CLKDIV_OUTDIV4_MASK;
|
SIM->CLKDIV |= (divide - (uint32_t)1) << SIM_CLKDIV_OUTDIV4_SHIFT;
|
}
|
|
/**
|
* @brief µÃµ½OUTDIV1µÄ·ÖƵֵ
|
* @param None
|
* @retval ·ÖƵֵ
|
*/
|
uint8_t SIM_GetOUTDIV1(void)
|
{
|
return (uint8_t)(SIM->CLKDIV);
|
}
|
|
/**
|
* @brief µÃµ½OUTDIV2µÄ·ÖƵֵ
|
* @param None
|
* @retval ·ÖƵֵ
|
*/
|
uint8_t SIM_GetOUTDIV2(void)
|
{
|
return (uint8_t)(SIM->CLKDIV >> 8);
|
}
|
|
/**
|
* @brief µÃµ½OUTDIV3µÄ·ÖƵֵ
|
* @param None
|
* @retval ·ÖƵֵ
|
*/
|
uint8_t SIM_GetOUTDIV3(void)
|
{
|
return (uint8_t)(SIM->CLKDIV >> 16);
|
}
|
|
/**
|
* @brief µÃµ½OUTDIV4µÄ·ÖƵֵ
|
* @param None
|
* @retval ·ÖƵֵ
|
*/
|
uint8_t SIM_GetOUTDIV4(void)
|
{
|
return (uint8_t)(SIM->CLKDIV >> 24);
|
}
|
|
/**
|
* @brief ϵͳ¹¦ºÄ¿ØÖÆ
|
* @param LP_Type: Ñ¡Ôñ¹Ø¶ÏµçÔ´µÄÄ£¿é
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg SIM_LP_USER_FLASH: Óû§Ä£Ê½ÊǹضÏFLASHµçÔ´
|
* @arg SIM_LP_USER_FLASH: STOPģʽÊǹضÏFLASHµçÔ´
|
* @arg SIM_LP_USER_RAM1: Óû§Ä£Ê½ÊǹضÏRAM1µçÔ´
|
* @arg SIM_LP_USER_RAM2: Óû§Ä£Ê½ÊǹضÏRAM2µçÔ´
|
* @arg SIM_LP_USER_RAM3: Óû§Ä£Ê½ÊǹضÏRAM3µçÔ´
|
* @arg SIM_LP_STOP_RAM1: STOPģʽÊǹضÏRAM1µçÔ´
|
* @arg SIM_LP_STOP_RAM2: STOPģʽÊǹضÏRAM2µçÔ´
|
* @arg SIM_LP_STOP_RAM3: STOPģʽÊǹضÏRAM3µçÔ´
|
* @retval None
|
*/
|
void SIM_LP_SetLowpowerCmd(uint32_t LP_Type)
|
{
|
SIM->LP = (0x55AA0000u | LP_Type);
|
}
|
|
/**
|
* @brief »ñÈ¡FLASHÉϵç±êÖ¾
|
* @param None
|
* @retval FLASHÉϵç±êÖ¾
|
*/
|
FlagStatus SIM_LP_FLASHPowerONStatus(void)
|
{
|
FlagStatus ret;
|
|
if( ((SIM->LP & SIM_LP_FLASHPON_MASK)>>SIM_LP_FLASHPON_SHIFT) != 0u)
|
{
|
ret= SET;
|
}
|
else
|
{
|
ret = RESET;
|
}
|
|
return ret;
|
}
|
|
/**
|
* @brief »ñÈ¡SRAMÉϵç±êÖ¾
|
* @param None
|
* @retval SRAMÉϵç±êÖ¾
|
*/
|
FlagStatus SIM_LP_SRAMPowerONStatus(void)
|
{
|
FlagStatus ret;
|
|
if( ((SIM->LP >> SIM_LP_SRAMPON_SHIFT)&(uint32_t)0x01) != 0u)
|
{
|
ret= SET;
|
}
|
else
|
{
|
ret = RESET;
|
}
|
|
return ret;
|
}
|
|
/**
|
* @brief ÉèÖÃϵͳÎȶ¨µÈ´ýʱ¼ä
|
* @param Clkwait: ICSOUTCLKµÄÎȶ¨¼ÆÊýÖÜÆÚ
|
* @retval None
|
*/
|
void SIM_WAIT_CLKWAITConfig(uint16_t Clkwait)
|
{
|
SIM->WAIT &= ~SIM_WAIT_CLKWAIT_MASK;
|
SIM->WAIT |= (uint32_t)Clkwait;
|
}
|
|
/**
|
* @brief ϵͳʱÖÓµÄ1us·ÖƵϵÊý
|
* @param Div1us: ϵͳʱÖÓµÄ1us·ÖƵϵÊý
|
* @retval None
|
*/
|
void SIM_WAIT_DIV1USConfig(uint16_t Div1us)
|
{
|
SIM->WAIT &= ~SIM_WAIT_DIV1US_MASK;
|
SIM->WAIT |= ((uint32_t)Div1us << SIM_WAIT_DIV1US_SHIFT);
|
}
|
|
/**
|
* @}
|
*/
|
|
/**
|
* @}
|
*/
|
|
/**
|
* @}
|
*/
|
|
|
#ifdef __cplusplus
|
}
|
#endif
|
