/**
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******************************************************************************
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* @file xl_spi.c
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* @author xu.wang
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* @version 4.5.2
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* @date Fri Mar 26 17:29:12 2021
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* @brief This file provide function about spi firmware program
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******************************************************************************
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* @attention
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*
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* 2019 by Chipways Communications,Inc. All Rights Reserved.
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* This software is supplied under the terms of a license
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* agreement or non-disclosure agreement with Chipways.
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* Passing on and copying of this document,and communication
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* of its contents is not permitted without prior written
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* authorization.
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*
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* <h2><center>© COPYRIGHT 2019 Chipways</center></h2>
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******************************************************************************
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*/
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#if defined(__cplusplus)
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extern "C" {
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#endif /* __cplusplus */
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/* Includes ---------------------------------------------------------------*/
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#include "xl_spi.h"
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/** @addtogroup XL6600_StdPeriph_Driver
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* @{
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*/
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/** @defgroup SPI SPI Module
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* @brief SPI Driver Modules Library
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* @{
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*/
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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/* Private functions ---------------------------------------------------------*/
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/** @defgroup SPI_Private_Functions
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* @{
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*/
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/**
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* @brief SPIÍâÉè»Ö¸´³õʼ״̬
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* @param SPIx: SPIÍâÉèµÄÑ¡Ôñ
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* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
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* @arg SPI0 £ºSPI0ÍâÉè
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* @arg SPI1 £ºSPI1ÍâÉè
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* @retval None
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*/
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void SPI_DeInit(SPI_Type *SPIx)
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{
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/* Deinitializes to default reset values */
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SPIx->CTRLR0 = 0x0007u;
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SPIx->CTRLR1 = 0x0000u;
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SPIx->BAUDR = 0x0000u;
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SPIx->TXFTLR = 0x0000u;
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SPIx->RXFTLR = 0x0000u;
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}
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/**
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* @brief ÉèÖÃSPIµÄģʽ
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* @param SPIx: SPIÍâÉèµÄÑ¡Ôñ
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* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
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* @arg SPI0 £ºSPI0ÍâÉè
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* @arg SPI1 £ºSPI1ÍâÉè
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* @param SPI_MODEType: Ñ¡ÔñSPI¹¤×÷ģʽ
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* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
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* @arg SPI_MODE_MASTER(0x00) £ºÖ÷»úģʽ
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* @arg SPI_MODE_SLAVE (0x01) £º´Ó»úģʽ
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* @retval None
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*/
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void SPI_SetMode(SPI_Type *SPIx,SPI_MODETypeDef SPI_MODEType)
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{
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if(SPI_MODEType != SPI_MODE_MASTER )
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{
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/* SLAVE SPI */
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SPIx->MODE |= SPI_MODE_MSTR_MASK;
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}
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else
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{
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/* MASTER SPI */
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SPIx->MODE &= ~SPI_MODE_MSTR_MASK;
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}
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}
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/**
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* @brief ÉèÖÃSPI·¢ËÍÊý¾Ý°üµÄģʽ
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* @param SPIx: SPIÍâÉèµÄÑ¡Ôñ
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* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
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* @arg SPI0 £ºSPI0ÍâÉè
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* @arg SPI1 £ºSPI1ÍâÉè
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* @param SPI_PACKType: Êý¾Ý°üµÄģʽ£¬Ñ¡ÔñÊdz¤°ü·¢ËÍ»¹ÊǶ̰ü·¢ËÍ
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* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
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* @arg SPI_PACK_CS_LOW(0x00) :ƬѡΪµÍ
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* @arg SPI_PACK_CS_HIGHT (0x01):ƬѡΪ¸ß
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* @retval None
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*/
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void SPI_SetPackCS(SPI_Type *SPIx,SPI_PACKCSTypeDef SPI_PACKCSType)
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{
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if(SPI_PACKCSType != SPI_PACK_CS_HIGHT )
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{
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/* SLAVE SPI */
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SPIx->MODE |= SPI_MODE_PACK_MASK;
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}
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else
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{
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/* MASTER SPI */
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SPIx->MODE &= ~SPI_MODE_PACK_MASK;
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}
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}
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/**
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* @brief SPIΪÖ÷»úʱ³õʼ»¯
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* @param SPIx: SPIÍâÉèµÄÑ¡Ôñ
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* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
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* @arg SPI0 £ºSPI0ÍâÉè
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* @arg SPI1 £ºSPI1ÍâÉè
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* @param SPI_MasterInitStruct: ÐèÒª³õʼ»¯µÄ²ÎÊý½á¹¹Ìå
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* @retval None
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*/
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void SPI_MasterInit(SPI_Type* SPIx, const SPI_MsterInitTypeDef *SPI_MasterInitStruct)
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{
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uint16_t slckdiv;
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/* Set the CTRLR0 */
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/* Set the bit in CTRLR0 Register */
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SPIx->CTRLR0 = (SPI_MasterInitStruct->SPI_SRL | SPI_MasterInitStruct->SPI_TMOD | \
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SPI_MasterInitStruct->SPI_SCPOL | SPI_MasterInitStruct->SPI_SCPH | \
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SPI_MasterInitStruct->SPI_DFS);
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/* Set the CTRLR1 Register bit*/
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SPIx->CTRLR1 = SPI_MasterInitStruct->SPI_NDF;
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/* Set the BAUDR */
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slckdiv= (uint16_t)(SPI_MasterInitStruct->SPI_SourceClk/SPI_MasterInitStruct->SPI_BAUDR);
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SPIx->BAUDR = slckdiv;
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/* Set the TXFTLR */
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SPIx->TXFTLR = SPI_MasterInitStruct->SPI_TFT;
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/* Set the RXFTLR */
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SPIx->RXFTLR = SPI_MasterInitStruct->SPI_RFT;
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}
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/**
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* @brief SPIΪ´Ó»úʱµÄ³õʼ»¯
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* @param SPIx: SPIÍâÉèµÄÑ¡Ôñ
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* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
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* @arg SPI0 £ºSPI0ÍâÉè
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* @arg SPI1 £ºSPI1ÍâÉè
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* @param SPI_SlaveInitTypeDef: ÐèÒª³õʼ»¯µÄ²ÎÊý½á¹¹Ìå
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* @retval None
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*/
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void SPI_SlaveInit(SPI_Type* SPIx, const SPI_SlaveInitTypeDef *SPI_SlaveInitStruct)
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{
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/* Set the CTRLR0 */
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/* Set the bit in CTRLR0 Register */
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SPIx->CTRLR0 = (SPI_SlaveInitStruct->SPI_SRL | SPI_SlaveInitStruct->SPI_TMOD | \
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SPI_SlaveInitStruct->SPI_SCPOL | SPI_SlaveInitStruct->SPI_SCPH | \
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SPI_SlaveInitStruct->SPI_DFS);
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/* check the slave output Enable */
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if(SPI_SlaveInitStruct->SPI_SLVOE != DISABLE)
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{
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SPIx->CTRLR0 &= ~SPI_CTRLR0_SLVOE_MASK;
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}
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else
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{
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SPIx->CTRLR0 |= SPI_CTRLR0_SLVOE_MASK;
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}
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/* Set the TXFTLR */
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SPIx->TXFTLR = SPI_SlaveInitStruct->SPI_TFT;
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/* Set the RXFTLR */
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SPIx->RXFTLR = SPI_SlaveInitStruct->SPI_RFT;
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}
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/**
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* @brief SPIʹÄÜ
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* @param SPIx: SPIÍâÉèµÄÑ¡Ôñ
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* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
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* @arg SPI0 £ºSPI0ÍâÉè
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* @arg SPI1 £ºSPI1ÍâÉè
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* @param NewState: ʹÄܺÍʧÄÜÑ¡Ôñ
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* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
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* @arg ENABLE £ºÊ¹ÄÜ
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* @arg DISENABLE £ºÊ§ÄÜ
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* @retval None
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*/
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void SPI_EnableCmd(SPI_Type *SPIx,FunctionalState NewState)
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{
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if(NewState != DISABLE )
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{
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/* Enable the SPI */
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SPIx->SPIENR |= SPI_SPIENR_SPIE_MASK;
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}
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else
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{
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/* Disable the SPI */
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SPIx->SPIENR &= ~SPI_SPIENR_SPIE_MASK;
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}
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}
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/**
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* @brief SPI×÷Ϊ´Ó»úʱʹÄÜÃüÁî
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* @param SPIx: SPIÍâÉèµÄÑ¡Ôñ
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* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
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* @arg SPI0 £ºSPI0ÍâÉè
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* @arg SPI1 £ºSPI1ÍâÉè
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* @param NewState: ʹÄܺÍʧÄÜÑ¡Ôñ
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* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
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* @arg ENABLE £ºÊ¹ÄÜ
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* @arg DISENABLE £ºÊ§ÄÜ
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* @retval None
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*/
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void SPI_SlaveEnableCmd(SPI_Type *SPIx,FunctionalState NewState)
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{
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if(NewState != DISABLE )
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{
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/* Enable the SPI Slave Select Output */
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SPIx->SER |= SPI_SER_SSEF_MASK;
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}
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else
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{
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/* Disable the SPI Slave Select Output */
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SPIx->SER &= ~SPI_SER_SSEF_MASK;
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}
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}
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/**
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* @brief SPI·¢ËÍÊý¾Ý
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* @param SPIx: SPIÍâÉèµÄÑ¡Ôñ
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* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
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* @arg SPI0 £ºSPI0ÍâÉè
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* @arg SPI1 £ºSPI1ÍâÉè
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* @param Data: ·¢Ë͵ÄÊý¾Ý
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* @retval None
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*/
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void SPI_SendData(SPI_Type *SPIx,uint16_t Data)
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{
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/* Write in the DR register the data to be sent */
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SPIx->DR[0] = Data;
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}
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/**
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* @brief SPI½ÓÊÕÊý¾Ý
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* @param SPIx: SPIÍâÉèµÄÑ¡Ôñ
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* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
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* @arg SPI0 £ºSPI0ÍâÉè
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* @arg SPI1 £ºSPI1ÍâÉè
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* @retval Data£ºSPI½ÓÊÕµÄÊý¾Ý
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*/
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uint16_t SPI_ReceiveData(const SPI_Type *SPIx)
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{
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uint16_t Data;
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Data =(uint16_t)SPIx->DR[0];
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/* Return the data in the DR register */
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return Data;
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}
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/**
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* @brief µÃµ½SPIÖÐFIFOÓÐЧÊý¾ÝµÄ¸öÊý
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* @param SPIx: SPIÍâÉèµÄÑ¡Ôñ
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* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
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* @arg SPI0 £ºSPI0ÍâÉè
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* @arg SPI1 £ºSPI1ÍâÉè
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* @param FIFOLevelDef: FIFOÀàÐÍ£¬·¢ËÍFIFO»ò½ÓÊÕFIFO
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* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
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* @arg SPI_TransmitFIFOLevel (0x00), ·¢ËÍFIFO
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* @arg SPI_ReceiveFIFOLevel (0x01) ½ÓÊÕFIFO
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* @retval fifolevel£ºSPIµÄFIFOÖеÃÓÐЧÊý¾Ý¸öÊý
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*/
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uint8_t SPI_GetFIFOLevel(const SPI_Type *SPIx,SPI_TXRXFIFOLevelDef FIFOLevelDef)
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{
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uint8_t fifolevel;
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/* Get the Transmit FIFO Level */
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if(FIFOLevelDef==SPI_TransmitFIFOLevel)
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{
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fifolevel=(uint8_t)(SPIx->TXFLR &SPI_TXFLR_TFL_MASK);
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}
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/* Get the Receive FIFO Level */
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else
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{
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fifolevel=(uint8_t)(SPIx->RXFLR &SPI_RXFLR_RFL_MASK);
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}
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/* return the fifolevel Value */
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return fifolevel;
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}
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/**
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* @brief µÃµ½SPI״̬
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* @param SPIx: SPIÍâÉèµÄÑ¡Ôñ
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* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
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* @arg SPI0 £ºSPI0ÍâÉè
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* @arg SPI1 £ºSPI1ÍâÉè
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* @param SPI_StatusTypeDef ½«Òª»ñÈ¡µÄ״̬ÀàÐÍÑ¡Ôñ
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* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
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* @arg SPI_SPIBusyFlagStatus £º SPI·±Ã¦±ê־λ
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* @arg SPI_TransmitFIFONotFullStatus£º ·¢ËÍFIFOδÂú
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* @arg SPI_TransmitFIFOEmptyStatus£º ·¢ËÍFIFOΪ¿Õ
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* @arg SPI_ReceiveFIFONotEmptyStatus£º ½ÓÊÕFIFO²»Îª¿Õ
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* @arg SPI_ReceiveFIFOFullStatus£º ½ÓÊÕFIFOÒÑÂú
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* @arg SPI_TransmissionErrorStatus£º Êý¾Ý·¢ËÍ´íÎó£¬Ö»ÓÐSPIΪ´Ó»úʱ²ÅÄÜʹÓô˹¦ÄÜ
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* @arg SPI_DataCollisionErrorStatus£º Êý¾Ý³åÍ»´íÎó£¬Ö»ÓÐSPIΪÖ÷»úʱ²ÅÓд˹¦ÄÜ
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* @retval SPI_Status£ºSPI״̬µÄÀàÐÍ
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* @arg 0:¶ÔӦ״̬δ²úÉú
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* @arg 1:¶ÔӦ״̬²úÉú
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*/
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uint8_t SPI_GetStatus(const SPI_Type *SPIx,SPI_StatusTypeDef SPI_StatusType)
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{
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uint8_t StatusTemp;
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/* Get all the status */
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StatusTemp = (uint8_t)(SPIx->SR);
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/* get the selected status */
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return (StatusTemp & (uint8_t)(1u<<(uint8_t)SPI_StatusType));
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}
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/**
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* @brief SPIÖжÏʹÄÜ
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* @param SPIx: SPIÍâÉèµÄÑ¡Ôñ
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* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg SPI0 £ºSPI0ÍâÉè
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* @arg SPI1 £ºSPI1ÍâÉè
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* @param SPI_InterruptTypeDef ʹÄÜÖжÏÀàÐÍ£¬ÆäÖµÈçÏ£º
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* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
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* @arg SPI_TransmitFIFOEmptyIT£º ·¢ËÍFIFOÒÑ¿ÕµÄÖжÏÑÚÂë
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* @arg SPI_TransmitFIFOOverflowIT£º ·¢ËÍFIFOÒç³öµÄÖжÏÑÚÂë
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* @arg SPI_ReceiveFIFOUnderflowIT£º ½ÓÊÕFIFOÏÂÒçµÄÖжÏÑÚÂë
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* @arg SPI_ReceiveFIFOOverflowIT£º ½ÓÊÕFIFOÒç³öµÄÖжÏÑÚÂë
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* @arg SPI_ReceiveFIFOFullIT £º ½ÓÊÕFIFOÒÑÂúµÄÖжÏÑÚÂë
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* @arg SPI_ALLIT £º ËùÓеÄÑÚÂë
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* @param NewState: ״̬ѡÔñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
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* @arg ENABLE £ºÊ¹ÄÜ
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* @arg DISENABLE £ºÊ§ÄÜ
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* @retval None
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*/
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void SPI_InterruptEn(SPI_Type *SPIx, SPI_InterruptTypeDef SPI_Interrupt, FunctionalState NewState)
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{
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uint8_t itmask;
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if(SPI_Interrupt == SPI_ALLIT)
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{
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if (NewState != DISABLE)
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{
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/* Enable the selected SPI interrupts */
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SPIx->IMR = 0xFFFFFFFFu;
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}
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else
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{
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/* Disable the selected SPI interrupts */
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SPIx->IMR = 0u;
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}
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}
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else
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{
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/* Get the interrupt enable index */
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itmask = (uint8_t)(1u<<(uint8_t)SPI_Interrupt);
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|
if (NewState != DISABLE)
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{
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/* Enable the selected SPI interrupts */
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SPIx->IMR |= itmask;
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}
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else
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{
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/* Disable the selected SPI interrupts */
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SPIx->IMR &= ~itmask;
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}
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}
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}
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/**
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* @brief SPIÇå³ýÖжÏ
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* @param SPIx: SPIÍâÉèµÄÑ¡Ôñ
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* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg SPI0 £ºSPI0ÍâÉè
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* @arg SPI1 £ºSPI1ÍâÉè
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* @param SPI_InterruptClearDef Çå³ýÖжϵÄÀàÐÍ£¬ÆäÖµÈçÏ£º
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* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
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* @arg SPI_TransmitFIFOOverflowITClear£º Çå¿Õ·¢ËÍFIFOÒç³öÖжϼĴæÆ÷
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* @arg SPI_ReceiveFIFOOverflowITClear£º Çå¿Õ½ÓÊÕFIFOÒç³öÖжϼĴæÆ÷
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* @arg SPI_ReceiveFIFOUnderflowITClear£º Çå¿Õ½ÓÊÕFIFOÏÂÒçÖжϼĴæÆ÷
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* @arg SPI_ALLITClear£º Çå¿ÕËùÓÐ״̬
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* @retval ÖжÏÀàÐÍ
|
*/
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uint8_t SPI_ClearInterrupt(const SPI_Type *SPIx, SPI_InterruptClearDef SPI_Interrupt2Clear)
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{
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uint8_t interrupt2clear;
|
|
/* Clear Transmit FIFO Overflow Interrupt */
|
if(SPI_Interrupt2Clear==SPI_TransmitFIFOOverflowITClear)
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{
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interrupt2clear=(uint8_t)(SPIx->TXOICR);
|
}
|
/* Clear Receive FIFO Overflow Interrupt */
|
else if(SPI_Interrupt2Clear==SPI_ReceiveFIFOOverflowITClear)
|
{
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interrupt2clear=(uint8_t)(SPIx->RXOICR);
|
}
|
/* Clear Receive FIFO Underflow Interrupt */
|
else if(SPI_Interrupt2Clear==SPI_ReceiveFIFOUnderflowITClear)
|
{
|
interrupt2clear=(uint8_t)(SPIx->RXUICR);
|
}
|
/* Clear Interrupt */
|
else
|
{
|
interrupt2clear=(uint8_t)(SPIx->ICR);
|
}
|
|
/* return the interrupt type */
|
return interrupt2clear;
|
}
|
|
/**
|
* @brief µÃµ½SPIÖжÏ״̬£¬ÖжÏÆÁ±ÎºóµÄ״̬
|
* @param SPIx: SPIÍâÉèµÄÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg SPI0 £ºSPI0ÍâÉè
|
* @arg SPI1 £ºSPI1ÍâÉè
|
* @param SPI_ITStatusMaskedDef »ñÈ¡µÄÖжÏÀàÐÍ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg SPI_TransmitFIFOEmptyITStatus £º ·¢ËÍFIFO¿ÕÖжÏ״̬
|
* @arg SPI_TransmitFIFOOverflowITStatus£º ·¢ËÍFIFOÒç³öÖжÏ״̬
|
* @arg SPI_ReceiveFIFOUnderflowITStatus£º ½ÓÊÕFIFOÏÂÒçÖжÏ״̬
|
* @arg SPI_ReceiveFIFOOverflowITStatus£º ½ÓÊÕFIFOÒç³öÖжÏ״̬
|
* @arg SPI_ReceiveFIFOFullITStatus£º ½ÓÊÕFIFOÒÑÂúÖжÏ״̬
|
* @retval ÖжÏ״̬
|
*/
|
uint8_t SPI_GetIntMaskedStatus(const SPI_Type *SPIx,SPI_ITStatusMaskedDef SPI_IntStatusType)
|
{
|
uint8_t IntStatusTemp;
|
|
/* Get all the interrupt status */
|
IntStatusTemp = (uint8_t)(SPIx->ISR);
|
|
/* get the selected interrupt status */
|
return (IntStatusTemp &(uint8_t)(1u<<(uint8_t)SPI_IntStatusType));
|
}
|
|
/**
|
* @brief »ñµÃSPIÖжÏǰ״̬£¬ÔÚÆÁ±Î֮ǰSPIÖжϵÄ״̬
|
* @param SPIx: SPIÍâÉèµÄÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg SPI0 £ºSPI0ÍâÉè
|
* @arg SPI1 £ºSPI1ÍâÉè
|
* @param SPI_RawITStatusTypeDef »ñÈ¡µÄÖжÏÀàÐÍ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg SPI_TransmitFIFOEmptyRawITStatus£º ·¢ËÍFIFOÔʼÖжÏΪ¿Õ״̬
|
* @arg SPI_TransmitFIFOOverflowRawITStatus£º ·¢ËÍFIFOÔʼÖжÏÒç³ö״̬
|
* @arg SPI_ReceiveFIFOUnderflowRawITStatus£º ½ÓÊÕFIFOÔʼÖжÏÏÂÒç״̬
|
* @arg SPI_ReceiveFIFOOverflowRawITStatus£º ½ÓÊÕFIFOÔʼÖжÏÒç³ö״̬
|
* @arg SPI_ReceiveFIFOFullRawITStatus£º ½ÓÊÕFIFOÔʼÖжÏÒÑÂú״̬
|
* @retval ÔʼÖжÏ״̬
|
*/
|
uint8_t SPI_GetRawIntStatus(const SPI_Type *SPIx,SPI_RawITStatusTypeDef SPI_RawIntStatusType)
|
{
|
uint8_t RawIntStatusTemp;
|
/* Get all the Raw interrupt status */
|
RawIntStatusTemp =(uint8_t)(SPIx->RISR);
|
|
/* get the selected Raw interrupt status */
|
return (RawIntStatusTemp &(uint8_t)(1u<<(uint8_t)SPI_RawIntStatusType));
|
}
|
|
/**
|
* @brief SPIÉèÖÃDMA·¢ËÍÊý¾ÝµÄ³¤¶È
|
* @param SPIx: SPIÍâÉèµÄÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg SPI0 £ºSPI0ÍâÉè
|
* @arg SPI1 £ºSPI1ÍâÉè
|
* @param lenght £ºÊý¾Ý³¤¶È
|
* @retval None
|
*/
|
void SPI_SetDMATxDataLenght(SPI_Type *SPIx,uint8_t lenght)
|
{
|
SPIx->DMATDLR = lenght;
|
}
|
/**
|
* @brief SPIÉèÖÃDMA½ÓÊÕÊý¾Ý³¤¶È
|
* @param SPIx: SPIÍâÉèµÄÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg SPI0 £ºSPI0ÍâÉè
|
* @arg SPI1 £ºSPI1ÍâÉè
|
* @param lenght £ºÊý¾Ý³¤¶È
|
* @retval None
|
*/
|
void SPI_SetDMARxDataLenght(SPI_Type *SPIx,uint8_t lenght)
|
{
|
SPIx->DMARDLR = lenght;
|
}
|
/**
|
* @brief SPIÉèÖÃDMA·¢ËÍʹÄÜ
|
* @param SPIx: SPIÍâÉèµÄÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg SPI0 £ºSPI0ÍâÉè
|
* @arg SPI1 £ºSPI1ÍâÉè
|
* @param NewState: ״̬ѡÔñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg ENABLE £ºÊ¹ÄÜ
|
* @arg DISENABLE £ºÊ§ÄÜ
|
* @retval None
|
*/
|
void SPI_DMATxEnableCmd(SPI_Type *SPIx,FunctionalState NewState)
|
{
|
if (NewState != DISABLE)
|
{
|
/* Enable the selected SPI interrupts */
|
SPIx->DMACR |= SPI_DMACR_TDMAE_MASK;
|
}
|
else
|
{
|
/* Disable the selected SPI interrupts */
|
SPIx->DMACR &= ~SPI_DMACR_TDMAE_MASK;
|
}
|
}
|
/**
|
* @brief SPIÉèÖÃDMA½ÓÊÕʹÄÜ
|
* @param SPIx: SPIÍâÉèµÄÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg SPI0 £ºSPI0ÍâÉè
|
* @arg SPI1 £ºSPI1ÍâÉè
|
* @param NewState: ״̬ѡÔñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg ENABLE £ºÊ¹ÄÜ
|
* @arg DISENABLE £ºÊ§ÄÜ
|
* @retval None
|
*/
|
void SPI_DMARxEnableCmd(SPI_Type *SPIx,FunctionalState NewState)
|
{
|
if (NewState != DISABLE)
|
{
|
/* Enable the selected SPI interrupts */
|
SPIx->DMACR |= SPI_DMACR_RDMAE_MASK;
|
}
|
else
|
{
|
/* Disable the selected SPI interrupts */
|
SPIx->DMACR &= ~SPI_DMACR_RDMAE_MASK;
|
}
|
}
|
/**
|
* @brief SPIÉèÖÃÑÓʱ²ÉÑùʱ¼ä
|
* @param SPIx: SPIÍâÉèµÄÑ¡Ôñ
|
* Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ:
|
* @arg SPI0 £ºSPI0ÍâÉè
|
* @arg SPI1 £ºSPI1ÍâÉè
|
* @param nclock £ºÑÓʱµÄʱ¼ä,È¡Öµ(0-255)
|
* @retval None
|
*/
|
void SPI_DelaySampling(SPI_Type *SPIx,uint32_t nclock)
|
{
|
SPIx->DLY = nclock;
|
}
|
|
|
/**
|
* @}
|
*/
|
|
/**
|
* @}
|
*/
|
|
/**
|
* @}
|
*/
|
#ifdef __cplusplus
|
}
|
#endif /* __cplusplus */
|
