/*!
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\file gd32e23x_fmc.c
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\brief FMC driver
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\version 2019-02-19, V1.0.0, firmware for GD32E23x
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*/
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/*
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Copyright (c) 2019, GigaDevice Semiconductor Inc.
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All rights reserved.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice, this
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list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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3. Neither the name of the copyright holder nor the names of its contributors
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may be used to endorse or promote products derived from this software without
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specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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OF SUCH DAMAGE.
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*/
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#include "gd32e23x_fmc.h"
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/* FMC register bit offset */
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#define OB_HIGH_WP_OFFSET ((uint32_t)8U)
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#define FMC_OBSTAT_USER_OFFSET ((uint32_t)8U)
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#define FMC_OBSTAT_DATA_OFFSET ((uint32_t)16U)
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/*!
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\brief unlock the main FMC operation
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it is better to used in pairs with fmc_lock
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\param[in] none
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\param[out] none
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\retval none
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*/
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void fmc_unlock(void)
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{
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if((RESET != (FMC_CTL & FMC_CTL_LK))){
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/* write the FMC key */
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FMC_KEY = UNLOCK_KEY0;
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FMC_KEY = UNLOCK_KEY1;
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}
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}
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/*!
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\brief lock the main FMC operation
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it is better to used in pairs with fmc_unlock after an operation
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\param[in] none
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\param[out] none
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\retval none
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*/
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void fmc_lock(void)
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{
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/* set the LK bit*/
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FMC_CTL |= FMC_CTL_LK;
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}
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/*!
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\brief set the wait state counter value
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\param[in] wscnt: wait state counter value
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\arg WS_WSCNT_0: 0 wait state added
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\arg WS_WSCNT_1: 1 wait state added
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\arg WS_WSCNT_2: 2 wait state added
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\param[out] none
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\retval none
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*/
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void fmc_wscnt_set(uint8_t wscnt)
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{
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uint32_t reg;
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reg = FMC_WS;
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/* set the wait state counter value */
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reg &= ~FMC_WS_WSCNT;
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FMC_WS = (reg | wscnt);
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}
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/*!
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\brief pre-fetch enable
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\param[in] none
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\param[out] none
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\retval none
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*/
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void fmc_prefetch_enable(void)
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{
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FMC_WS |= FMC_WS_PFEN;
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}
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/*!
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\brief pre-fetch disable
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\param[in] none
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\param[out] none
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\retval none
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*/
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void fmc_prefetch_disable(void)
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{
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FMC_WS &= ~FMC_WS_PFEN;
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}
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/*!
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\brief erase page
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\param[in] page_address: target page start address
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\param[out] none
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\retval fmc_state: state of FMC
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\arg FMC_READY: the operation has been completed
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\arg FMC_BUSY: the operation is in progress
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\arg FMC_PGERR: program error
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\arg FMC_PGAERR: program alignment error
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\arg FMC_WPERR: erase/program protection error
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\arg FMC_TOERR: timeout error
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\arg FMC_OB_HSPC: option byte security protection code high
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*/
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fmc_state_enum fmc_page_erase(uint32_t page_address)
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{
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fmc_state_enum fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
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if(FMC_READY == fmc_state){
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/* start page erase */
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FMC_CTL |= FMC_CTL_PER;
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FMC_ADDR = page_address;
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FMC_CTL |= FMC_CTL_START;
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/* wait for the FMC ready */
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fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
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/* reset the PER bit */
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FMC_CTL &= ~FMC_CTL_PER;
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}
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/* return the FMC state */
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return fmc_state;
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}
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/*!
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\brief erase whole chip
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\param[in] none
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\param[out] none
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\retval fmc_state: state of FMC
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\arg FMC_READY: the operation has been completed
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\arg FMC_BUSY: the operation is in progress
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\arg FMC_PGERR: program error
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\arg FMC_PGAERR: program alignment error
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\arg FMC_WPERR: erase/program protection error
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\arg FMC_TOERR: timeout error
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\arg FMC_OB_HSPC: option byte security protection code high
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*/
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fmc_state_enum fmc_mass_erase(void)
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{
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fmc_state_enum fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
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if(FMC_READY == fmc_state){
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/* start chip erase */
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FMC_CTL |= FMC_CTL_MER;
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FMC_CTL |= FMC_CTL_START;
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/* wait for the FMC ready */
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fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
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/* reset the MER bit */
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FMC_CTL &= ~FMC_CTL_MER;
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}
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/* return the fmc state */
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return fmc_state;
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}
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/*!
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\brief program a double word at the corresponding address in main flash, this
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function also applies to OTP(address 0x1FFF_7000~0x1FFF_73FF) programming
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\param[in] address: address to program
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\param[in] data: double word to program
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\param[out] none
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\retval fmc_state: state of FMC
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\arg FMC_READY: the operation has been completed
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\arg FMC_BUSY: the operation is in progress
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\arg FMC_PGERR: program error
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\arg FMC_PGAERR: program alignment error
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\arg FMC_WPERR: erase/program protection error
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\arg FMC_TOERR: timeout error
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\arg FMC_OB_HSPC: option byte security protection code high
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*/
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fmc_state_enum fmc_doubleword_program(uint32_t address, uint64_t data)
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{
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uint32_t data0, data1;
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fmc_state_enum fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
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data0 = (uint32_t)(data & 0xFFFFFFFFU);
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data1 = (uint32_t)((data>>32U) & 0xFFFFFFFFU);
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/* configure program width */
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FMC_WS |= FMC_WS_PGW;
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if(FMC_READY == fmc_state){
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/* set the PG bit to start program */
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FMC_CTL |= FMC_CTL_PG;
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REG32(address) = data0;
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REG32(address+4U) = data1;
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/* wait for the FMC ready */
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fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
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/* reset the PG bit */
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FMC_CTL &= ~FMC_CTL_PG;
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}
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FMC_WS &= ~(FMC_WS_PGW);
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/* return the FMC state */
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return fmc_state;
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}
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/*!
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\brief program a word at the corresponding address in main flash, this function
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also applies to OTP(address 0x1FFF_7000~0x1FFF_73FF) programming
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\param[in] address: address to program
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\param[in] data: word to program
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\param[out] none
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\retval fmc_state: state of FMC
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\arg FMC_READY: the operation has been completed
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\arg FMC_BUSY: the operation is in progress
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\arg FMC_PGERR: program error
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\arg FMC_PGAERR: program alignment error
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\arg FMC_WPERR: erase/program protection error
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\arg FMC_TOERR: timeout error
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\arg FMC_OB_HSPC: option byte security protection code high
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*/
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fmc_state_enum fmc_word_program(uint32_t address, uint32_t data)
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{
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fmc_state_enum fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
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if(FMC_READY == fmc_state){
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/* set the PG bit to start program */
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FMC_CTL |= FMC_CTL_PG;
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REG32(address) = data;
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/* wait for the FMC ready */
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fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
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/* reset the PG bit */
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FMC_CTL &= ~FMC_CTL_PG;
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}
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/* return the FMC state */
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return fmc_state;
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}
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/*!
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\brief unlock the option byte operation
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it is better to used in pairs with ob_lock
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\param[in] none
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\param[out] none
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\retval none
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*/
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void ob_unlock(void)
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{
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if(RESET == (FMC_CTL & FMC_CTL_OBWEN)){
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/* write the FMC key */
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FMC_OBKEY = UNLOCK_KEY0;
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FMC_OBKEY = UNLOCK_KEY1;
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}
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/* wait until OBWEN bit is set by hardware */
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while(RESET == (FMC_CTL & FMC_CTL_OBWEN)){
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}
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}
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/*!
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\brief lock the option byte operation
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it is better to used in pairs with ob_unlock after an operation
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\param[in] none
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\param[out] none
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\retval none
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*/
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void ob_lock(void)
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{
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/* reset the OBWE bit */
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FMC_CTL &= ~FMC_CTL_OBWEN;
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}
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/*!
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\brief reload the option byte and generate a system reset
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\param[in] none
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\param[out] none
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\retval none
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*/
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void ob_reset(void)
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{
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/* set the OBRLD bit */
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FMC_CTL |= FMC_CTL_OBRLD;
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}
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/*!
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\brief get option byte value
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\param[in] addr: address of option byte
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\arg OB_SPC_USER_ADDRESS: address of option byte security protection and user
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\arg OB_DATA_ADDRESS: address of option byte data
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\arg OB_WP_ADDRESS: address of option byte write protection
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\param[out] option byte value
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*/
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uint32_t option_byte_value_get(uint32_t addr)
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{
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return *(volatile uint32_t *)(addr);
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}
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/*!
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\brief erase the option byte
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programmer must ensure FMC & option byte are both unlocked before calling this function
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\param[in] none
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\param[out] none
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\retval fmc_state: state of FMC
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\arg FMC_READY: the operation has been completed
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\arg FMC_BUSY: the operation is in progress
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\arg FMC_PGERR: program error
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\arg FMC_PGAERR: program alignment error
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\arg FMC_WPERR: erase/program protection error
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\arg FMC_TOERR: timeout error
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\arg FMC_OB_HSPC: option byte security protection code high
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*/
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fmc_state_enum ob_erase(void)
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{
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uint16_t fmc_spc;
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uint32_t val;
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uint32_t fmc_plevel = ob_obstat_plevel_get();
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fmc_state_enum fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
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/* get the original option byte security protection code */
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if(OB_OBSTAT_PLEVEL_NO == fmc_plevel){
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fmc_spc = FMC_NSPC;
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}else if(OB_OBSTAT_PLEVEL_LOW == fmc_plevel){
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fmc_spc = FMC_LSPC;
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}else{
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fmc_spc = FMC_HSPC;
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fmc_state = FMC_OB_HSPC;
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}
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val = HIGH_16BITS_MASK | (uint32_t)fmc_spc;
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if(FMC_READY == fmc_state){
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/* start erase the option byte */
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FMC_CTL |= FMC_CTL_OBER;
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FMC_CTL |= FMC_CTL_START;
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/* wait for the FMC ready */
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fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
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if(FMC_READY == fmc_state){
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/* reset the OBER bit */
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FMC_CTL &= ~FMC_CTL_OBER;
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/* set the OBPG bit */
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FMC_CTL |= FMC_CTL_OBPG;
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/* restore the last get option byte security protection code */
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OB_SPC_USER = val;
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/* wait for the FMC ready */
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fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
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if(FMC_TOERR != fmc_state){
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/* reset the OBPG bit */
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FMC_CTL &= ~FMC_CTL_OBPG;
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}
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}else{
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if(FMC_TOERR != fmc_state){
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/* reset the OBPG bit */
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FMC_CTL &= ~FMC_CTL_OBPG;
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}
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}
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}
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/* return the FMC state */
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return fmc_state;
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}
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/*!
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\brief enable option byte write protection (OB_WP)
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\param[in] ob_wp: write protection configuration data. Notice that set the
|
bit to 1 if you want to protect the corresponding pages.
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\param[out] none
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\retval fmc_state: state of FMC
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\arg FMC_READY: the operation has been completed
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\arg FMC_BUSY: the operation is in progress
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\arg FMC_PGERR: program error
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\arg FMC_PGAERR: program alignment error
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\arg FMC_WPERR: erase/program protection error
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\arg FMC_TOERR: timeout error
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\arg FMC_OB_HSPC: option byte security protection code high
|
*/
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fmc_state_enum ob_write_protection_enable(uint16_t ob_wp)
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{
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uint32_t ob_wrp_val = 0U;
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|
fmc_state_enum fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
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ob_wp = (uint16_t)(~ob_wp);
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ob_wrp_val |= (uint32_t)ob_wp&0x00FFU;
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ob_wrp_val |= (((uint32_t)ob_wp&0xFF00U)>>8U) << 16U;
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|
if(FMC_READY == fmc_state){
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/* set the OBPG bit*/
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FMC_CTL |= FMC_CTL_OBPG;
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if(0xFFFFFFFFU != ob_wrp_val){
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OB_WP = ob_wrp_val;
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|
/* wait for the FMC ready */
|
fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
|
}
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if(FMC_TOERR != fmc_state){
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/* reset the OBPG bit */
|
FMC_CTL &= ~FMC_CTL_OBPG;
|
}
|
}
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/* return the FMC state */
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return fmc_state;
|
}
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|
/*!
|
\brief configure security protection
|
\param[in] ob_spc: specify security protection code
|
\arg FMC_NSPC: no security protection
|
\arg FMC_LSPC: low security protection
|
\arg FMC_HSPC: high security protection
|
\param[out] none
|
\retval fmc_state: state of FMC
|
\arg FMC_READY: the operation has been completed
|
\arg FMC_BUSY: the operation is in progress
|
\arg FMC_PGERR: program error
|
\arg FMC_PGAERR: program alignment error
|
\arg FMC_WPERR: erase/program protection error
|
\arg FMC_TOERR: timeout error
|
\arg FMC_OB_HSPC: option byte security protection code high
|
*/
|
fmc_state_enum ob_security_protection_config(uint16_t ob_spc)
|
{
|
uint32_t val;
|
fmc_state_enum fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
|
|
val = option_byte_value_get(OB_SPC_USER_ADDRESS);
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/* the OB_SPC byte cannot be reprogrammed if protection level is high */
|
if(OB_OBSTAT_PLEVEL_HIGH == ob_obstat_plevel_get()){
|
fmc_state = FMC_OB_HSPC;
|
}
|
|
val &= ~LOW_16BITS_MASK;
|
val |= (uint32_t)ob_spc;
|
|
if(FMC_READY == fmc_state){
|
/* start erase the option byte */
|
FMC_CTL |= FMC_CTL_OBER;
|
FMC_CTL |= FMC_CTL_START;
|
|
/* wait for the FMC ready */
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fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
|
|
if(FMC_READY == fmc_state){
|
|
/* reset the OBER bit */
|
FMC_CTL &= ~FMC_CTL_OBER;
|
|
/* enable the option bytes programming */
|
FMC_CTL |= FMC_CTL_OBPG;
|
|
OB_SPC_USER = val;
|
|
/* wait for the FMC ready */
|
fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
|
|
if(FMC_TOERR != fmc_state){
|
/* reset the OBPG bit */
|
FMC_CTL &= ~FMC_CTL_OBPG;
|
}
|
}else{
|
if(FMC_TOERR != fmc_state){
|
/* reset the OBER bit */
|
FMC_CTL &= ~FMC_CTL_OBER;
|
}
|
}
|
}
|
/* return the FMC state */
|
return fmc_state;
|
}
|
|
/*!
|
\brief program the FMC user option byte
|
this function can only clear the corresponding bits to be 0 rather than 1.
|
the function ob_erase is used to set all the bits to be 1.
|
\param[in] ob_user: user option byte
|
one or more parameters (bitwise AND) can be selected which are shown as below:
|
\arg OB_FWDGT_HW: hardware free watchdog timer
|
\arg OB_DEEPSLEEP_RST: no reset when entering deepsleep mode
|
\arg OB_STDBY_RST: no reset when entering standby mode
|
\arg OB_BOOT1_SET_1: BOOT1 bit is 1
|
\arg OB_VDDA_DISABLE: disable VDDA monitor
|
\arg OB_SRAM_PARITY_ENABLE: enable sram parity check
|
\param[out] none
|
\retval fmc_state: state of FMC
|
\arg FMC_READY: the operation has been completed
|
\arg FMC_BUSY: the operation is in progress
|
\arg FMC_PGERR: program error
|
\arg FMC_PGAERR: program alignment error
|
\arg FMC_WPERR: erase/program protection error
|
\arg FMC_TOERR: timeout error
|
\arg FMC_OB_HSPC: option byte security protection code high
|
*/
|
fmc_state_enum ob_user_write(uint8_t ob_user)
|
{
|
uint32_t val_spc_user;
|
/* check whether FMC is ready or not */
|
fmc_state_enum fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
|
|
val_spc_user = option_byte_value_get(OB_SPC_USER_ADDRESS);
|
|
val_spc_user &= ~HIGH_16BITS_MASK;
|
|
val_spc_user |= ((uint32_t)ob_user<<16U);
|
|
if(FMC_READY == fmc_state){
|
/* start erase the option byte */
|
FMC_CTL |= FMC_CTL_OBER;
|
FMC_CTL |= FMC_CTL_START;
|
|
/* wait for the FMC ready */
|
fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
|
|
if(FMC_READY == fmc_state){
|
|
/* reset the OBER bit */
|
FMC_CTL &= ~FMC_CTL_OBER;
|
|
/* enable the option bytes programming */
|
FMC_CTL |= FMC_CTL_OBPG;
|
|
OB_SPC_USER = val_spc_user;
|
|
/* wait for the FMC ready */
|
fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
|
|
if(FMC_TOERR != fmc_state){
|
/* reset the OBPG bit */
|
FMC_CTL &= ~FMC_CTL_OBPG;
|
}
|
}else{
|
if(FMC_TOERR != fmc_state){
|
/* reset the OBER bit */
|
FMC_CTL &= ~FMC_CTL_OBER;
|
}
|
}
|
}
|
/* return the FMC state */
|
return fmc_state;
|
}
|
|
/*!
|
\brief program the FMC data option byte
|
\param[in] data: the data to be programmed, OB_DATA[0:15]
|
\param[out] none
|
\retval fmc_state: state of FMC
|
\arg FMC_READY: the operation has been completed
|
\arg FMC_BUSY: the operation is in progress
|
\arg FMC_PGERR: program error
|
\arg FMC_PGAERR: program alignment error
|
\arg FMC_WPERR: erase/program protection error
|
\arg FMC_TOERR: timeout error
|
\arg FMC_OB_HSPC: option byte security protection code high
|
*/
|
fmc_state_enum ob_data_program(uint16_t data)
|
{
|
fmc_state_enum fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
|
uint32_t val = 0U;
|
|
val |= (uint32_t)data&0x00FFU;
|
val |= (((uint32_t)data&0xFF00U)>>8U) << 16U;
|
|
if(FMC_READY == fmc_state){
|
/* set the OBPG bit */
|
FMC_CTL |= FMC_CTL_OBPG;
|
OB_DATA = val;
|
|
/* wait for the FMC ready */
|
fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
|
|
if(FMC_TOERR != fmc_state){
|
/* reset the OBPG bit */
|
FMC_CTL &= ~FMC_CTL_OBPG;
|
}
|
}
|
/* return the FMC state */
|
return fmc_state;
|
}
|
|
/*!
|
\brief get OB_USER in register FMC_OBSTAT
|
\param[in] none
|
\param[out] none
|
\retval ob_user
|
*/
|
uint8_t ob_user_get(void)
|
{
|
return (uint8_t)(FMC_OBSTAT >> FMC_OBSTAT_USER_OFFSET);
|
}
|
|
/*!
|
\brief get OB_DATA in register FMC_OBSTAT
|
\param[in] none
|
\param[out] none
|
\retval ob_data
|
*/
|
uint16_t ob_data_get(void)
|
{
|
return (uint16_t)(FMC_OBSTAT >> FMC_OBSTAT_DATA_OFFSET);
|
}
|
|
/*!
|
\brief get the FMC option byte write protection (OB_WP) in register FMC_WP
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\param[in] none
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\param[out] none
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\retval OB_WP
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*/
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uint16_t ob_write_protection_get(void)
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{
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return (uint16_t)(FMC_WP);
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}
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/*!
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\brief get the value of FMC option byte security protection level (PLEVEL) in FMC_OBSTAT register
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\param[in] none
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\param[out] none
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\retval the value of PLEVEL
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*/
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uint32_t ob_obstat_plevel_get(void)
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{
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return (FMC_OBSTAT & (FMC_OBSTAT_PLEVEL_BIT0 | FMC_OBSTAT_PLEVEL_BIT1));
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}
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/* FMC interrupts and flags management functions */
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/*!
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\brief enable FMC interrupt
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\param[in] interrupt: the FMC interrupt source
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\arg FMC_INTEN_END: FMC end of operation interrupt
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\arg FMC_INTEN_ERR: FMC error interrupt
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\param[out] none
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\retval none
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*/
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void fmc_interrupt_enable(uint32_t interrupt)
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{
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FMC_CTL |= interrupt;
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}
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/*!
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\brief disable FMC interrupt
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\param[in] interrupt: the FMC interrupt source
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\arg FMC_INTEN_END: FMC end of operation interrupt
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\arg FMC_INTEN_ERR: FMC error interrupt
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\param[out] none
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\retval none
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*/
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void fmc_interrupt_disable(uint32_t interrupt)
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{
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FMC_CTL &= ~(uint32_t)interrupt;
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}
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/*!
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\brief get flag set or reset
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\param[in] flag: check FMC flag
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only one parameter can be selected which is shown as below:
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\arg FMC_FLAG_BUSY: FMC busy flag
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\arg FMC_FLAG_PGERR: FMC programming error flag
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\arg FMC_FLAG_PGAERR: FMC program alignment error flag
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\arg FMC_FLAG_WPERR: FMC write protection error flag
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\arg FMC_FLAG_END: FMC end of programming flag
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\param[out] none
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\retval FlagStatus: SET or RESET
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*/
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FlagStatus fmc_flag_get(uint32_t flag)
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{
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FlagStatus status = RESET;
|
|
if(FMC_STAT & flag){
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status = SET;
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}
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/* return the state of corresponding FMC flag */
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return status;
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}
|
|
/*!
|
\brief clear the FMC pending flag by writing 1
|
\param[in] flag: clear FMC flag
|
one or more parameters can be selected which is shown as below:
|
\arg FMC_FLAG_PGERR: FMC programming error flag
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\arg FMC_FLAG_PGAERR: FMC program alignment error flag
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\arg FMC_FLAG_WPERR: FMC write protection error flag
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\arg FMC_FLAG_END: FMC end of programming flag
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\param[out] none
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\retval none
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*/
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void fmc_flag_clear(uint32_t flag)
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{
|
/* clear the flags */
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FMC_STAT = flag;
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}
|
|
/*!
|
\brief get intrrupt flag set or reset
|
\param[in] flag: check FMC flag
|
only one parameter can be selected which is shown as below:
|
\arg FMC_INT_FLAG_PGERR: FMC programming error flag
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\arg FMC_INT_FLAG_PGAERR: FMC program alignment error flag
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\arg FMC_INT_FLAG_WPERR: FMC write protection error flag
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\arg FMC_INT_FLAG_END: FMC end of programming flag
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\param[out] none
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\retval FlagStatus: SET or RESET
|
*/
|
FlagStatus fmc_interrupt_flag_get(uint32_t int_flag)
|
{
|
uint32_t intenable = 0U, flagstatus = 0U;
|
|
if(FMC_INT_FLAG_END == int_flag){
|
/* get the interrupt enable bit status */
|
intenable = FMC_CTL & FMC_INTEN_END;
|
/* get the corresponding flag bit status */
|
flagstatus = FMC_STAT & int_flag;
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if(intenable && flagstatus){
|
return SET;
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}else{
|
return RESET;
|
}
|
}else{
|
/* get the interrupt enable bit status */
|
intenable = FMC_CTL & FMC_INTEN_ERR;
|
/* get the corresponding flag bit status */
|
flagstatus = FMC_STAT & int_flag;
|
if(intenable && flagstatus){
|
return SET;
|
}else{
|
return RESET;
|
}
|
}
|
}
|
|
/*!
|
\brief clear the FMC interrupt pending flag by writing 1
|
\param[in] flag: clear FMC flag
|
one or more parameters can be selected which is shown as below:
|
\arg FMC_INT_FLAG_PGERR: FMC programming error flag
|
\arg FMC_INT_FLAG_PGAERR: FMC program alignment error flag
|
\arg FMC_INT_FLAG_WPERR: FMC write protection error flag
|
\arg FMC_INT_FLAG_END: FMC end of programming flag
|
\param[out] none
|
\retval none
|
*/
|
void fmc_interrupt_flag_clear(uint32_t int_flag)
|
{
|
/* clear the flags */
|
FMC_STAT = int_flag;
|
}
|
|
/*!
|
\brief get the FMC state
|
\param[in] none
|
\param[out] none
|
\retval fmc_state
|
*/
|
fmc_state_enum fmc_state_get(void)
|
{
|
fmc_state_enum fmc_state = FMC_READY;
|
|
if((uint32_t)0x00U != (FMC_STAT & FMC_STAT_BUSY)){
|
fmc_state = FMC_BUSY;
|
}else{
|
if((uint32_t)0x00U != (FMC_STAT & FMC_STAT_WPERR)){
|
fmc_state = FMC_WPERR;
|
}else{
|
if((uint32_t)0x00U != (FMC_STAT & FMC_STAT_PGERR)){
|
fmc_state = FMC_PGERR;
|
}
|
}
|
}
|
/* return the FMC state */
|
return fmc_state;
|
}
|
|
/*!
|
\brief check whether FMC is ready or not
|
\param[in] timeout: timeout count
|
\param[out] none
|
\retval fmc_state
|
*/
|
fmc_state_enum fmc_ready_wait(uint32_t timeout)
|
{
|
fmc_state_enum fmc_state = FMC_BUSY;
|
|
/* wait for FMC ready */
|
do{
|
/* get FMC state */
|
fmc_state = fmc_state_get();
|
timeout--;
|
}while((FMC_BUSY == fmc_state) && (0U != timeout));
|
|
if(FMC_BUSY == fmc_state){
|
fmc_state = FMC_TOERR;
|
}
|
/* return the FMC state */
|
return fmc_state;
|
}
|
