/*!
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\file gd32e23x_syscfg.c
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\brief SYSCFG driver
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\version 2019-02-19, V1.0.0, firmware for GD32E23x
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*/
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/*
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Copyright (c) 2019, GigaDevice Semiconductor Inc.
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All rights reserved.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice, this
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list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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3. Neither the name of the copyright holder nor the names of its contributors
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may be used to endorse or promote products derived from this software without
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specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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OF SUCH DAMAGE.
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*/
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#include "gd32e23x_syscfg.h"
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/*!
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\brief reset the SYSCFG registers
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\param[in] none
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\param[out] none
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\retval none
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*/
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void syscfg_deinit(void)
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{
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rcu_periph_reset_enable(RCU_CFGCMPRST);
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rcu_periph_reset_disable(RCU_CFGCMPRST);
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}
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/*!
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\brief enable the DMA channels remapping
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\param[in] syscfg_dma_remap: specify the DMA channels to remap
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\arg SYSCFG_DMA_REMAP_TIMER16: remap TIMER16 channel0 and UP DMA requests to channel1(defaut channel0)
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\arg SYSCFG_DMA_REMAP_TIMER15: remap TIMER15 channel2 and UP DMA requests to channel3(defaut channel2)
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\arg SYSCFG_DMA_REMAP_USART0RX: remap USART0 Rx DMA request to channel4(default channel2)
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\arg SYSCFG_DMA_REMAP_USART0TX: remap USART0 Tx DMA request to channel3(default channel1)
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\arg SYSCFG_DMA_REMAP_ADC: remap ADC DMA requests from channel0 to channel1
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\arg SYSCFG_PA11_REMAP_PA12: remap PA11 PA12
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\param[out] none
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\retval none
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*/
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void syscfg_dma_remap_enable(uint32_t syscfg_dma_remap)
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{
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SYSCFG_CFG0 |= syscfg_dma_remap;
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}
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/*!
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\brief disable the DMA channels remapping
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\param[in] syscfg_dma_remap: specify the DMA channels to remap
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\arg SYSCFG_DMA_REMAP_TIMER16: remap TIMER16 channel0 and UP DMA requests to channel1(defaut channel0)
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\arg SYSCFG_DMA_REMAP_TIMER15: remap TIMER15 channel2 and UP DMA requests to channel3(defaut channel2)
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\arg SYSCFG_DMA_REMAP_USART0RX: remap USART0 Rx DMA request to channel4(default channel2)
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\arg SYSCFG_DMA_REMAP_USART0TX: remap USART0 Tx DMA request to channel3(default channel1)
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\arg SYSCFG_DMA_REMAP_ADC: remap ADC DMA requests from channel0 to channel1
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\arg SYSCFG_PA11_REMAP_PA12: remap PA11 PA12
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\param[out] none
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\retval none
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*/
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void syscfg_dma_remap_disable(uint32_t syscfg_dma_remap)
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{
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SYSCFG_CFG0 &= ~syscfg_dma_remap;
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}
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#if defined(GD32E230)
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/*!
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\brief enable PB9 high current capability
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\param[in] none
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\param[out] none
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\retval none
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*/
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void syscfg_high_current_enable(void)
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{
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SYSCFG_CFG0 |= SYSCFG_HIGH_CURRENT_ENABLE;
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}
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/*!
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\brief disable PB9 high current capability
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\param[in] none
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\param[out] none
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\retval none
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*/
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void syscfg_high_current_disable(void)
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{
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SYSCFG_CFG0 &= SYSCFG_HIGH_CURRENT_DISABLE;
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}
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#endif
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/*!
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\brief configure the GPIO pin as EXTI Line
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\param[in] exti_port: specify the GPIO port used in EXTI
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\arg EXTI_SOURCE_GPIOx(x = A,B,C,F): EXTI GPIO port
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\param[in] exti_pin: specify the EXTI line
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\arg EXTI_SOURCE_PINx(GPIOA x = 0..15,GPIOB x = 0..15,GPIOC x = 13..15,GPIOF x = 0.1.6.7): EXTI GPIO pin
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\param[out] none
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\retval none
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*/
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void syscfg_exti_line_config(uint8_t exti_port, uint8_t exti_pin)
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{
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uint32_t clear_exti_mask = ~((uint32_t)EXTI_SS_MASK << (EXTI_SS_MSTEP(exti_pin)));
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uint32_t config_exti_mask = ((uint32_t)exti_port) << (EXTI_SS_MSTEP(exti_pin));
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switch(exti_pin / EXTI_SS_JSTEP){
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case EXTISS0:
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/* clear EXTI source line(0..3) */
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SYSCFG_EXTISS0 &= clear_exti_mask;
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/* configure EXTI soure line(0..3) */
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SYSCFG_EXTISS0 |= config_exti_mask;
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break;
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case EXTISS1:
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/* clear EXTI soure line(4..7) */
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SYSCFG_EXTISS1 &= clear_exti_mask;
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/* configure EXTI soure line(4..7) */
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SYSCFG_EXTISS1 |= config_exti_mask;
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break;
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case EXTISS2:
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/* clear EXTI soure line(8..11) */
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SYSCFG_EXTISS2 &= clear_exti_mask;
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/* configure EXTI soure line(8..11) */
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SYSCFG_EXTISS2 |= config_exti_mask;
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break;
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case EXTISS3:
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/* clear EXTI soure line(12..15) */
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SYSCFG_EXTISS3 &= clear_exti_mask;
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/* configure EXTI soure line(12..15) */
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SYSCFG_EXTISS3 |= config_exti_mask;
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break;
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default:
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break;
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}
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}
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/*!
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\brief connect TIMER0/14/15/16 break input to the selected parameter
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\param[in] syscfg_lock: Specify the parameter to be connected
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\arg SYSCFG_LOCK_LOCKUP: Cortex-M23 lockup output connected to the break input
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\arg SYSCFG_LOCK_SRAM_PARITY_ERROR: SRAM_PARITY check error connected to the break input
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\arg SYSCFG_LOCK_LVD: LVD interrupt connected to the break input
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\param[out] none
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\retval none
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*/
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void syscfg_lock_config(uint32_t syscfg_lock)
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{
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SYSCFG_CFG2 |= syscfg_lock;
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}
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/*!
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\brief set the wait state counter value
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\param[in] irq_latency: IRQ_LATENCY value (0x00 - 0xFF)
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\param[out] none
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\retval none
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*/
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void irq_latency_set(uint8_t irq_latency)
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{
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uint32_t reg;
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reg = SYSCFG_CPU_IRQ_LAT &(~(uint32_t)SYSCFG_CPU_IRQ_LAT_IRQ_LATENCY);
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reg |= (uint32_t)(IRQ_LATENCY(irq_latency));
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SYSCFG_CPU_IRQ_LAT = (uint32_t)reg;
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}
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/*!
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\brief check if the specified flag in SYSCFG_CFG2 is set or not.
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\param[in] syscfg_flag: specify the flag in SYSCFG_CFG2 to check.
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\arg SYSCFG_SRAM_PCEF: SRAM parity check error flag.
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\param[out] none
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\retval the syscfg_flag state returned (SET or RESET).
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*/
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FlagStatus syscfg_flag_get(uint32_t syscfg_flag)
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{
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if((SYSCFG_CFG2 & syscfg_flag) != (uint32_t)RESET){
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return SET;
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}else{
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return RESET;
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}
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}
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/*!
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\brief clear the flag in SYSCFG_CFG2 by writing 1.
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\param[in] syscfg_flag: Specify the flag in SYSCFG_CFG2 to clear.
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\arg SYSCFG_SRAM_PCEF: SRAM parity check error flag.
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\param[out] none
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\retval none
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*/
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void syscfg_flag_clear(uint32_t syscfg_flag)
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{
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SYSCFG_CFG2 |= (uint32_t) syscfg_flag;
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}
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