first init commit

ethan

2022-11-07 94c5f9f92a0c02e7e32ff6709f561546a00e81ee

 CAHB_L4_PH.ioc

@@ -6,9 +6,10 @@
ADC1.Channel-5\#ChannelRegularConversion=ADC_CHANNEL_VBAT
ADC1.Channel-6\#ChannelRegularConversion=ADC_CHANNEL_8
ADC1.DMAContinuousRequests=ENABLE
ADC1.EOCSelection=ADC_EOC_SINGLE_CONV
ADC1.EnableInjectedConversion=DISABLE
ADC1.ExternalTrigConv=ADC_EXTERNALTRIG_T1_TRGO
ADC1.IPParameters=Rank-1\#ChannelRegularConversion,Channel-1\#ChannelRegularConversion,SamplingTime-1\#ChannelRegularConversion,OffsetNumber-1\#ChannelRegularConversion,NbrOfConversionFlag,EnableInjectedConversion,ExternalTrigConv,NbrOfConversion,Rank-2\#ChannelRegularConversion,Channel-2\#ChannelRegularConversion,SamplingTime-2\#ChannelRegularConversion,OffsetNumber-2\#ChannelRegularConversion,Rank-3\#ChannelRegularConversion,Channel-3\#ChannelRegularConversion,SamplingTime-3\#ChannelRegularConversion,OffsetNumber-3\#ChannelRegularConversion,Rank-4\#ChannelRegularConversion,Channel-4\#ChannelRegularConversion,SamplingTime-4\#ChannelRegularConversion,OffsetNumber-4\#ChannelRegularConversion,Rank-5\#ChannelRegularConversion,Channel-5\#ChannelRegularConversion,SamplingTime-5\#ChannelRegularConversion,OffsetNumber-5\#ChannelRegularConversion,master,Rank-6\#ChannelRegularConversion,Channel-6\#ChannelRegularConversion,SamplingTime-6\#ChannelRegularConversion,OffsetNumber-6\#ChannelRegularConversion,DMAContinuousRequests
ADC1.IPParameters=Rank-1\#ChannelRegularConversion,Channel-1\#ChannelRegularConversion,SamplingTime-1\#ChannelRegularConversion,OffsetNumber-1\#ChannelRegularConversion,NbrOfConversionFlag,EnableInjectedConversion,ExternalTrigConv,NbrOfConversion,Rank-2\#ChannelRegularConversion,Channel-2\#ChannelRegularConversion,SamplingTime-2\#ChannelRegularConversion,OffsetNumber-2\#ChannelRegularConversion,Rank-3\#ChannelRegularConversion,Channel-3\#ChannelRegularConversion,SamplingTime-3\#ChannelRegularConversion,OffsetNumber-3\#ChannelRegularConversion,Rank-4\#ChannelRegularConversion,Channel-4\#ChannelRegularConversion,SamplingTime-4\#ChannelRegularConversion,OffsetNumber-4\#ChannelRegularConversion,Rank-5\#ChannelRegularConversion,Channel-5\#ChannelRegularConversion,SamplingTime-5\#ChannelRegularConversion,OffsetNumber-5\#ChannelRegularConversion,master,Rank-6\#ChannelRegularConversion,Channel-6\#ChannelRegularConversion,SamplingTime-6\#ChannelRegularConversion,OffsetNumber-6\#ChannelRegularConversion,DMAContinuousRequests,EOCSelection
ADC1.NbrOfConversion=6
ADC1.NbrOfConversionFlag=1
ADC1.OffsetNumber-1\#ChannelRegularConversion=ADC_OFFSET_NONE
@@ -263,17 +264,17 @@
ProjectManager.LastFirmware=true
ProjectManager.LibraryCopy=1
ProjectManager.MainLocation=Core/Src
ProjectManager.NoMain=false
ProjectManager.NoMain=true
ProjectManager.PreviousToolchain=
ProjectManager.ProjectBuild=false
ProjectManager.ProjectFileName=CAHB_L4_PH.ioc
ProjectManager.ProjectName=CAHB_L4_PH
ProjectManager.RegisterCallBack=
ProjectManager.RegisterCallBack=I2C
ProjectManager.StackSize=0x400
ProjectManager.TargetToolchain=Makefile
ProjectManager.ToolChainLocation=
ProjectManager.UnderRoot=false
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_CAN1_Init-CAN1-false-HAL-true,4-MX_ADC1_Init-ADC1-false-HAL-true,5-MX_CRC_Init-CRC-false-HAL-true,6-MX_I2C1_Init-I2C1-false-HAL-true,7-MX_I2C2_Init-I2C2-false-HAL-true,8-MX_TIM1_Init-TIM1-false-HAL-true,9-MX_DMA_Init-DMA-false-HAL-true
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_CAN1_Init-CAN1-false-HAL-true,4-MX_ADC1_Init-ADC1-false-HAL-true,5-MX_CRC_Init-CRC-false-HAL-true,6-MX_I2C1_Init-I2C1-false-HAL-true,7-MX_I2C2_Init-I2C2-false-HAL-true,8-MX_TIM1_Init-TIM1-false-HAL-true,9-MX_DMA_Init-DMA-false-HAL-true,10-MX_TIM15_Init-TIM15-false-HAL-true
RCC.ADCFreq_Value=32000000
RCC.AHBFreq_Value=64000000
RCC.APB1Freq_Value=64000000
@@ -342,11 +343,13 @@
TIM1.Channel-Output\ Compare2\ CH2=TIM_CHANNEL_2
TIM1.Channel-Output\ Compare4\ No\ Output=TIM_CHANNEL_4
TIM1.CounterMode=TIM_COUNTERMODE_UP
TIM1.IPParameters=Channel-Output Compare1 CH1,Channel-Output Compare2 CH2,Period,AutoReloadPreload,OCMode_1,OCPolarity_1,OCIdleState_1,TIM_MasterOutputTrigger,CounterMode,OCMode_2,Channel-Output Compare4 No Output,TIM_MasterOutputTrigger2
TIM1.OCIdleState_1=TIM_OCIDLESTATE_RESET
TIM1.IPParameters=Channel-Output Compare1 CH1,Channel-Output Compare2 CH2,Period,AutoReloadPreload,OCMode_1,OCPolarity_1,OCIdleState_1,TIM_MasterOutputTrigger,CounterMode,OCMode_2,TIM_MasterOutputTrigger2,OCIdleState_2,OCPolarity_2,Channel-Output Compare4 No Output
TIM1.OCIdleState_1=TIM_OCIDLESTATE_SET
TIM1.OCIdleState_2=TIM_OCIDLESTATE_SET
TIM1.OCMode_1=TIM_OCMODE_ACTIVE
TIM1.OCMode_2=TIM_OCMODE_ACTIVE
TIM1.OCPolarity_1=TIM_OCPOLARITY_HIGH
TIM1.OCPolarity_1=TIM_OCPOLARITY_LOW
TIM1.OCPolarity_2=TIM_OCPOLARITY_LOW
TIM1.Period=4096
TIM1.TIM_MasterOutputTrigger=TIM_TRGO_OC4REF
TIM1.TIM_MasterOutputTrigger2=TIM_TRGO2_RESET