| | |
| | | motor_drive.timeout = 0; |
| | | motor_drive.speed = 0; |
| | | motor_drive.enable_flag = 0; |
| | | motor_pluse = 2000; |
| | | memset(motor_drive.speed_group, 0, SPEED_FILTER_NUM); |
| | | |
| | | hall_enable(); |
| | |
| | | case 1: |
| | | /* channel U configuration */ |
| | | |
| | | timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE); |
| | | // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE); |
| | | SetPwmDuty(MOTOR_OUT_CH_U, 0); |
| | | MOTOR_U_L_ENABLE; |
| | | // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_DISABLE); |
| | | |
| | | /* channel V configuration */ |
| | | timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE); |
| | | // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE); |
| | | SetPwmDuty(MOTOR_OUT_CH_V, 0); |
| | | MOTOR_V_L_DISABLE; |
| | | // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE); |
| | | |
| | | /* channel W configuration */ |
| | | timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0); |
| | | timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_ENABLE); |
| | | // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0); |
| | | // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_ENABLE); |
| | | SetPwmDuty(MOTOR_OUT_CH_W, motor_pluse); |
| | | MOTOR_W_L_DISABLE; |
| | | // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_ENABLE); |
| | | |
| | |
| | | /* next step: step 6 configuration .u-v` breakover---------------------------- */ |
| | | case 2: |
| | | /* channel U configuration */ |
| | | timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM0); |
| | | timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_ENABLE); |
| | | // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM0); |
| | | // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_ENABLE); |
| | | SetPwmDuty(MOTOR_OUT_CH_U, motor_pluse); |
| | | // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_DISABLE); |
| | | MOTOR_U_L_DISABLE; |
| | | |
| | | /* channel V configuration */ |
| | | // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0); |
| | | timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE); |
| | | // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE); |
| | | SetPwmDuty(MOTOR_OUT_CH_V, 0); |
| | | // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE); |
| | | MOTOR_V_L_ENABLE; |
| | | |
| | | /* channel W configuration */ |
| | | // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0); |
| | | timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_DISABLE); |
| | | // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_DISABLE); |
| | | SetPwmDuty(MOTOR_OUT_CH_W, 0); |
| | | // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_ENABLE); |
| | | MOTOR_W_L_DISABLE; |
| | | |
| | |
| | | case 3: |
| | | /* channel U configuration */ |
| | | // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM0); |
| | | timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE); |
| | | // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE); |
| | | SetPwmDuty(MOTOR_OUT_CH_U, 0); |
| | | // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_ENABLE); |
| | | MOTOR_U_L_DISABLE; |
| | | |
| | | /* channel V configuration */ |
| | | // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0); |
| | | timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE); |
| | | // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE); |
| | | SetPwmDuty(MOTOR_OUT_CH_V, 0); |
| | | // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE); |
| | | MOTOR_V_L_ENABLE; |
| | | |
| | | /* channel W configuration */ |
| | | timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0); |
| | | timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_ENABLE); |
| | | // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0); |
| | | // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_ENABLE); |
| | | SetPwmDuty(MOTOR_OUT_CH_W, motor_pluse); |
| | | // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE); |
| | | MOTOR_W_L_DISABLE; |
| | | |
| | |
| | | case 4: |
| | | /* channel U configuration */ |
| | | // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM0); |
| | | timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE); |
| | | // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE); |
| | | // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_ENABLE); |
| | | SetPwmDuty(MOTOR_OUT_CH_U, 0); |
| | | MOTOR_U_L_DISABLE; |
| | | |
| | | /* channel V configuration */ |
| | | timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0); |
| | | timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_ENABLE); |
| | | // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0); |
| | | // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_ENABLE); |
| | | SetPwmDuty(MOTOR_OUT_CH_V, motor_pluse); |
| | | // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE); |
| | | MOTOR_V_L_DISABLE; |
| | | |
| | | /* channel W configuration */ |
| | | // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0); |
| | | timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE); |
| | | // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE); |
| | | SetPwmDuty(MOTOR_OUT_CH_W, 0); |
| | | // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE); |
| | | MOTOR_W_L_ENABLE; |
| | | |
| | |
| | | /* next step: step 1 configuration .V-U` breakover---------------------------- */ |
| | | case 5: |
| | | /* channel U configuration */ |
| | | timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE); |
| | | // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE); |
| | | SetPwmDuty(MOTOR_OUT_CH_U, 0); |
| | | // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_DISABLE); |
| | | MOTOR_U_L_ENABLE; |
| | | |
| | | /* channel V configuration */ |
| | | timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0); |
| | | timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_ENABLE); |
| | | // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0); |
| | | // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_ENABLE); |
| | | SetPwmDuty(MOTOR_OUT_CH_V, motor_pluse); |
| | | // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_ENABLE); |
| | | MOTOR_V_L_DISABLE; |
| | | |
| | | /* channel W configuration */ |
| | | // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0); |
| | | timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE); |
| | | // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE); |
| | | SetPwmDuty(MOTOR_OUT_CH_W, 0); |
| | | // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE); |
| | | MOTOR_W_L_DISABLE; |
| | | break; |
| | |
| | | /* next step: step 4 configuration .U-W` breakover---------------------------- */ |
| | | case 6: |
| | | /* channel U configuration */ |
| | | timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM0); |
| | | timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_ENABLE); |
| | | // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM0); |
| | | // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_ENABLE); |
| | | SetPwmDuty(MOTOR_OUT_CH_U, motor_pluse); |
| | | // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_DISABLE); |
| | | MOTOR_U_L_DISABLE; |
| | | |
| | | /* channel V configuration */ |
| | | // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0); |
| | | timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE); |
| | | // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE); |
| | | SetPwmDuty(MOTOR_OUT_CH_V, 0); |
| | | // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_ENABLE); |
| | | MOTOR_V_L_DISABLE; |
| | | |
| | | /* channel W configuration */ |
| | | timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_DISABLE); |
| | | // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_DISABLE); |
| | | SetPwmDuty(MOTOR_OUT_CH_W, 0); |
| | | // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE); |
| | | MOTOR_W_L_ENABLE; |
| | | |
| | |
| | | { |
| | | /* ÉèÖö¨Ê±Æ÷ͨµÀÊä³ö PWM µÄÕ¼¿Õ±È */ |
| | | motor_pluse = pulse; |
| | | SetPwmDuty(TIMER_CH_0, motor_pluse); |
| | | SetPwmDuty(TIMER_CH_1, motor_pluse); |
| | | SetPwmDuty(TIMER_CH_2, motor_pluse); |
| | | // SetPwmDuty(TIMER_CH_0, motor_pluse); |
| | | // SetPwmDuty(TIMER_CH_1, motor_pluse); |
| | | // SetPwmDuty(TIMER_CH_2, motor_pluse); |
| | | |
| | | if (motor_drive.enable_flag) |
| | | { |