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| | | rcu_osci_on(RCU_IRC8M); //ʹÓÃÄÚ²¿8MRCʱÖÓ |
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| | | rcu_osci_stab_wait(RCU_IRC8M); |
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| | | rcu_system_clock_source_config(RCU_CKSYSSRC_PLL); //sysclk is PLL |
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| | | rcu_pll_config(RCU_PLLSRC_IRC8M_DIV2, RCU_PLL_MUL12); //8MHz/2 =4MHz PLL =4MHz*12 =48MHz |
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| | | rcu_ahb_clock_config(RCU_AHB_CKSYS_DIV1); //AHB 48M |
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| | | rcu_apb1_clock_config(RCU_APB1_CKAHB_DIV1); //APB1 48M |
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| | | rcu_apb2_clock_config(RCU_APB2_CKAHB_DIV1); //APB2 48M |
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| | | rcu_adc_clock_config(RCU_ADCCK_APB2_DIV4); //max 14M,current:12M |
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| | | rcu_pll_config(RCU_PLLSRC_IRC8M_DIV2, RCU_PLL_MUL16); //8MHz/2 =4MHz PLL =4MHz*16 =64MHz |
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| | | rcu_ahb_clock_config(RCU_AHB_CKSYS_DIV1); //AHB 64M |
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| | | rcu_apb1_clock_config(RCU_APB1_CKAHB_DIV1); //APB1 64M |
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| | | rcu_apb2_clock_config(RCU_APB2_CKAHB_DIV1); //APB2 64M |
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| | | rcu_adc_clock_config(RCU_ADCCK_APB2_DIV4); //max 14M,current:64/4=16M |
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| | | rcu_usart_clock_config(RCU_USART0SRC_IRC8M); //USART0 8M |
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| | | rcu_rtc_clock_config(RCU_RTCSRC_NONE); |
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