tao_z
2021-07-10 9051da0184cf839037f1370c729b27bf065b9c95
马达可以转动
4 files modified
106 ■■■■■ changed files
USR/SRC/Motor.c 73 ●●●●● patch | view | raw | blame | history
USR/SRC/RttTask.c 12 ●●●● patch | view | raw | blame | history
USR/SRC/main.c 15 ●●●● patch | view | raw | blame | history
USR/SRC/pwm.c 6 ●●●● patch | view | raw | blame | history
USR/SRC/Motor.c
@@ -18,6 +18,7 @@
    motor_drive.timeout = 0;
    motor_drive.speed = 0;
    motor_drive.enable_flag = 0;
    motor_pluse = 2000;
    memset(motor_drive.speed_group, 0, SPEED_FILTER_NUM);
    hall_enable();
@@ -248,18 +249,21 @@
    case 1:
        /*  channel U configuration */
        timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE);
        // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE);
        SetPwmDuty(MOTOR_OUT_CH_U, 0);
        MOTOR_U_L_ENABLE;
        // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_DISABLE);
        /*  channel V configuration */
        timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE);
        // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE);
        SetPwmDuty(MOTOR_OUT_CH_V, 0);
        MOTOR_V_L_DISABLE;
        // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE);
        /*  channel W configuration */
        timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0);
        timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_ENABLE);
        // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0);
        // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_ENABLE);
        SetPwmDuty(MOTOR_OUT_CH_W, motor_pluse);
        MOTOR_W_L_DISABLE;
        // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_ENABLE);
@@ -268,20 +272,23 @@
    /* next step: step 6 configuration .u-v` breakover---------------------------- */
    case 2:
        /*  channel U configuration */
        timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM0);
        timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_ENABLE);
        // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM0);
        // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_ENABLE);
        SetPwmDuty(MOTOR_OUT_CH_U, motor_pluse);
        // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_DISABLE);
        MOTOR_U_L_DISABLE;
        /*  channel V configuration */
        // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0);
        timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE);
        // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE);
        SetPwmDuty(MOTOR_OUT_CH_V, 0);
        // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE);
        MOTOR_V_L_ENABLE;
        /*  channel W configuration */
        // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0);
        timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_DISABLE);
        // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_DISABLE);
        SetPwmDuty(MOTOR_OUT_CH_W, 0);
        // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_ENABLE);
        MOTOR_W_L_DISABLE;
@@ -291,19 +298,22 @@
    case 3:
        /*  channel U configuration */
        // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM0);
        timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE);
        // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE);
        SetPwmDuty(MOTOR_OUT_CH_U, 0);
        // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_ENABLE);
        MOTOR_U_L_DISABLE;
        /*  channel V configuration */
        // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0);
        timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE);
        // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE);
        SetPwmDuty(MOTOR_OUT_CH_V, 0);
        // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE);
        MOTOR_V_L_ENABLE;
        /*  channel W configuration */
        timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0);
        timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_ENABLE);
        // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0);
        // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_ENABLE);
        SetPwmDuty(MOTOR_OUT_CH_W, motor_pluse);
        // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE);
        MOTOR_W_L_DISABLE;
@@ -313,19 +323,22 @@
    case 4:
        /*  channel U configuration */
        // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM0);
        timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE);
        // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE);
        // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_ENABLE);
        SetPwmDuty(MOTOR_OUT_CH_U, 0);
        MOTOR_U_L_DISABLE;
        /*  channel V configuration */
        timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0);
        timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_ENABLE);
        // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0);
        // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_ENABLE);
        SetPwmDuty(MOTOR_OUT_CH_V, motor_pluse);
        // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE);
        MOTOR_V_L_DISABLE;
        /*  channel W configuration */
        // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0);
        timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE);
        // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE);
        SetPwmDuty(MOTOR_OUT_CH_W, 0);
        // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE);
        MOTOR_W_L_ENABLE;
@@ -334,19 +347,22 @@
    /* next step: step 1 configuration .V-U` breakover---------------------------- */
    case 5:
        /*  channel U configuration */
        timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE);
        // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE);
        SetPwmDuty(MOTOR_OUT_CH_U, 0);
        // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_DISABLE);
        MOTOR_U_L_ENABLE;
        /*  channel V configuration */
        timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0);
        timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_ENABLE);
        // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0);
        // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_ENABLE);
        SetPwmDuty(MOTOR_OUT_CH_V, motor_pluse);
        // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_ENABLE);
        MOTOR_V_L_DISABLE;
        /*  channel W configuration */
        // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0);
        timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE);
        // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE);
        SetPwmDuty(MOTOR_OUT_CH_W, 0);
        // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE);
        MOTOR_W_L_DISABLE;
        break;
@@ -354,19 +370,22 @@
    /* next step: step 4 configuration .U-W` breakover---------------------------- */
    case 6:
        /*  channel U configuration */
        timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM0);
        timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_ENABLE);
        // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM0);
        // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_ENABLE);
        SetPwmDuty(MOTOR_OUT_CH_U, motor_pluse);
        // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_DISABLE);
        MOTOR_U_L_DISABLE;
        /*  channel V configuration */
        // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0);
        timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE);
        // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE);
        SetPwmDuty(MOTOR_OUT_CH_V, 0);
        // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_ENABLE);
        MOTOR_V_L_DISABLE;
        /*  channel W configuration */
        timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_DISABLE);
        // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_DISABLE);
        SetPwmDuty(MOTOR_OUT_CH_W, 0);
        // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE);
        MOTOR_W_L_ENABLE;
@@ -401,9 +420,9 @@
{
    /* ÉèÖö¨Ê±Æ÷ͨµÀÊä³ö PWM µÄÕ¼¿Õ±È */
    motor_pluse = pulse;
    SetPwmDuty(TIMER_CH_0, motor_pluse);
    SetPwmDuty(TIMER_CH_1, motor_pluse);
    SetPwmDuty(TIMER_CH_2, motor_pluse);
    // SetPwmDuty(TIMER_CH_0, motor_pluse);
    // SetPwmDuty(TIMER_CH_1, motor_pluse);
    // SetPwmDuty(TIMER_CH_2, motor_pluse);
    if (motor_drive.enable_flag)
    {
USR/SRC/RttTask.c
@@ -2,6 +2,8 @@
#include "SEGGER_RTT.h"
#include "SysCfg.h"
#include "gd32e23x.h"
#include "pwm.h"
#include "motor.h"
static uint32_t RttDataOutPutFlag = 0;
static void RTT_KeyValue(uint32_t key);
extern void RTT_TaskInit(void)
@@ -57,8 +59,14 @@
    case 'T':
        SEGGER_RTT_printf(0, "Software Compile time is :%s %s\n\r", &COMPILE_DATE, &COMPILE_TIME);
        break;
    default:
    case 'o':
        timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0);
        timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_ENABLE);
        break;
    case 's':
        timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_DISABLE);
        break;
    default:
        break;`
    }
}
USR/SRC/main.c
@@ -15,9 +15,18 @@
static void Comm_Task(void *p)
{
    // uint8_t step = 0;
    // step = get_hall_state();
    // SEGGER_RTT_printf(0, "Hall state is:%d!\n", step);
    // static uint16_t test_cnt = 0;
    // ++test_cnt;
    // if (test_cnt == 15)
    // {
    //     timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0);
    //     timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_ENABLE);
    // }
    // else if (test_cnt > 30)
    // {
    //     test_cnt = 0;
    //     timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_DISABLE);
    // }
}
int main()
USR/SRC/pwm.c
@@ -61,21 +61,21 @@
    timercontralcfg.period = PERIOD_CMP;                 // set period(counter value 0~2^15)
    timer_init(TIMER0, &timercontralcfg);
    timeroutcfg[0].ocpolarity = TIMER_OC_POLARITY_HIGH; //channel output polarity is high
    timeroutcfg[0].ocpolarity = TIMER_OC_POLARITY_HIGH; //channel output polarity is low
    timeroutcfg[0].ocnpolarity = TIMER_OCN_POLARITY_HIGH;
    timeroutcfg[0].outputstate = TIMER_CCX_ENABLE;    //channel enable
    timeroutcfg[0].outputnstate = TIMER_CCXN_DISABLE; //channel complementary DISABLE
    timeroutcfg[0].ocidlestate = TIMER_OC_IDLE_STATE_LOW;
    timeroutcfg[0].ocnidlestate = TIMER_OCN_IDLE_STATE_LOW;
    timeroutcfg[1].ocpolarity = TIMER_OC_POLARITY_HIGH; //channel output polarity is high
    timeroutcfg[1].ocpolarity = TIMER_OC_POLARITY_HIGH; //channel output polarity is LOW
    timeroutcfg[1].ocnpolarity = TIMER_OCN_POLARITY_HIGH;
    timeroutcfg[1].outputstate = TIMER_CCX_ENABLE;    //channel enable
    timeroutcfg[1].outputnstate = TIMER_CCXN_DISABLE; //channel complementary  DISABLE
    timeroutcfg[1].ocidlestate = TIMER_OC_IDLE_STATE_LOW;
    timeroutcfg[1].ocnidlestate = TIMER_OCN_IDLE_STATE_LOW;
    timeroutcfg[2].ocpolarity = TIMER_OC_POLARITY_HIGH; //channel output polarity is high
    timeroutcfg[2].ocpolarity = TIMER_OC_POLARITY_HIGH; //channel output polarity is LOW
    timeroutcfg[2].ocnpolarity = TIMER_OCN_POLARITY_HIGH;
    timeroutcfg[2].outputstate = TIMER_CCX_ENABLE;    //channel enable
    timeroutcfg[2].outputnstate = TIMER_CCXN_DISABLE; //channel complementary  DISABLE