From 1a4ea70147216f586f1341d4f1981733ed2c203c Mon Sep 17 00:00:00 2001
From: tao_z <tzj0429@163.com>
Date: Sat, 03 Jul 2021 21:41:30 +0800
Subject: [PATCH] 采用三个外部中断触发
---
USR/SRC/Clock.c | 2
USR/SRC/Motor.c | 74 ++++++++++++++----------
USR/INC/bldc_ctrl.h | 4
USR/SRC/bldc_ctrl.c | 7 ++
USR/SRC/gd32e23x_it.c | 3
USR/INC/pwm.h | 2
USR/SRC/GPIO.c | 29 +++++----
USR/SRC/pwm.c | 32 +++++-----
USR/SRC/main.c | 5 +
9 files changed, 92 insertions(+), 66 deletions(-)
diff --git a/USR/INC/bldc_ctrl.h b/USR/INC/bldc_ctrl.h
index c3e7b32..0c17079 100644
--- a/USR/INC/bldc_ctrl.h
+++ b/USR/INC/bldc_ctrl.h
@@ -4,8 +4,8 @@
//���Ŷ���
/*******************************************************/
// ����������� SD ��
-#define SHUTDOWN_PIN GPIO_PIN_15
-#define SHUTDOWN_GPIO_PORT GPIOD
+#define SHUTDOWN_PIN GPIO_PIN_6
+#define SHUTDOWN_GPIO_PORT GPIOA
// #define SHUTDOWN_GPIO_CLK_ENABLE() __HAL_RCC_GPIOD_CLK_ENABLE()
/*******************************************************/
diff --git a/USR/INC/pwm.h b/USR/INC/pwm.h
index f3e99c5..da32571 100644
--- a/USR/INC/pwm.h
+++ b/USR/INC/pwm.h
@@ -5,7 +5,7 @@
#define PERIOD_CAP (30000U)
//48Mzhz / 3000 = 16Khz = 62.5us
-#define PERIOD_CMP (4000u)
+#define PERIOD_CMP (3000u)
void TimerInit(void);
void SetPwmDuty(uint16_t ch, uint32_t duty);
diff --git a/USR/SRC/Clock.c b/USR/SRC/Clock.c
index 892233a..3b3e58e 100644
--- a/USR/SRC/Clock.c
+++ b/USR/SRC/Clock.c
@@ -38,7 +38,7 @@
;
}
/* configure the systick handler priority */
- NVIC_SetPriority(SysTick_IRQn, 0x00);
+ NVIC_SetPriority(SysTick_IRQn, 0x01);
}
/*!
diff --git a/USR/SRC/GPIO.c b/USR/SRC/GPIO.c
index 7e0b581..c4226b4 100644
--- a/USR/SRC/GPIO.c
+++ b/USR/SRC/GPIO.c
@@ -6,35 +6,34 @@
{
rcu_periph_clock_enable(RCU_GPIOA);
rcu_periph_clock_enable(RCU_GPIOB);
- rcu_periph_clock_enable(RCU_GPIOF);
-
+ // rcu_periph_clock_enable(RCU_GPIOF);
+ /* enable the CFGCMP clock */
+ rcu_periph_clock_enable(RCU_CFGCMP);
//初始化配置霍尔输入引脚
gpio_mode_set(HALL_SENSOR_A_PORT, GPIO_MODE_INPUT, GPIO_PUPD_NONE, HALL_SENSOR_A_PIN);
gpio_mode_set(HALL_SENSOR_B_PORT, GPIO_MODE_INPUT, GPIO_PUPD_NONE, HALL_SENSOR_B_PIN);
gpio_mode_set(HALL_SENSOR_C_PORT, GPIO_MODE_INPUT, GPIO_PUPD_NONE, HALL_SENSOR_C_PIN);
- /* enable the CFGCMP clock */
- rcu_periph_clock_enable(RCU_CFGCMP);
- nvic_irq_enable(EXTI4_15_IRQn, 0U);
+
/* connect EXTI line to GPIO pin */
syscfg_exti_line_config(EXTI_SOURCE_GPIOB, EXTI_SOURCE_PIN4);
syscfg_exti_line_config(EXTI_SOURCE_GPIOB, EXTI_SOURCE_PIN5);
syscfg_exti_line_config(EXTI_SOURCE_GPIOA, EXTI_SOURCE_PIN15);
- exti_init(EXTI_4 | EXTI_5 | EXTI_15, EXTI_INTERRUPT, EXTI_TRIG_RISING); //配置外部上升沿中断
+ exti_init(EXTI_4, EXTI_INTERRUPT, EXTI_TRIG_RISING); //配置外部上升沿中断
+ exti_init(EXTI_5, EXTI_INTERRUPT, EXTI_TRIG_RISING); //配置外部上升沿中断
+ exti_init(EXTI_15, EXTI_INTERRUPT, EXTI_TRIG_RISING); //配置外部上升沿中断
+ nvic_irq_enable(EXTI4_15_IRQn, 0U);
exti_interrupt_flag_clear(EXTI_4 | EXTI_5 | EXTI_15);
//初始化PWM引脚
gpio_mode_set(PWM_HIN1_PORT, GPIO_MODE_AF, GPIO_PUPD_NONE, PWM_HIN1_PIN);
gpio_af_set(PWM_HIN1_PORT, GPIO_AF_2, PWM_HIN1_PIN);
- gpio_output_options_set(PWM_HIN1_PORT, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, PWM_HIN1_PIN);
gpio_mode_set(PWM_HIN2_PORT, GPIO_MODE_AF, GPIO_PUPD_NONE, PWM_HIN2_PIN);
gpio_af_set(PWM_HIN2_PORT, GPIO_AF_2, PWM_HIN2_PIN);
- gpio_output_options_set(PWM_HIN2_PORT, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, PWM_HIN2_PIN);
gpio_mode_set(PWM_HIN3_PORT, GPIO_MODE_AF, GPIO_PUPD_NONE, PWM_HIN3_PIN);
gpio_af_set(PWM_HIN3_PORT, GPIO_AF_2, PWM_HIN3_PIN);
- gpio_output_options_set(PWM_HIN3_PORT, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, PWM_HIN3_PIN);
// gpio_mode_set(PWM_LIN1_PORT, GPIO_MODE_AF, GPIO_PUPD_NONE, PWM_LIN1_PIN);
// gpio_af_set(PWM_LIN1_PORT, GPIO_AF_2, PWM_LIN1_PIN);
@@ -87,13 +86,19 @@
}
extern uint8_t Get_HallSensorA_State(void)
{
- return (uint8_t)(gpio_input_bit_get(HALL_SENSOR_A_PORT, HALL_SENSOR_A_PIN));
+ uint8_t rtn = 0;
+ rtn = (SET == gpio_input_bit_get(HALL_SENSOR_A_PORT, HALL_SENSOR_A_PIN)) ? 1 : 0;
+ return rtn;
}
extern uint8_t Get_HallSensorB_State(void)
{
- return (uint8_t)(gpio_input_bit_get(HALL_SENSOR_B_PORT, HALL_SENSOR_B_PIN));
+ uint8_t rtn = 0;
+ rtn = (SET == gpio_input_bit_get(HALL_SENSOR_B_PORT, HALL_SENSOR_B_PIN)) ? 1 : 0;
+ return rtn;
}
extern uint8_t Get_HallSensorC_State(void)
{
- return (uint8_t)(gpio_input_bit_get(HALL_SENSOR_C_PORT, HALL_SENSOR_C_PIN));
+ uint8_t rtn = 0;
+ rtn = (SET == gpio_input_bit_get(HALL_SENSOR_C_PORT, HALL_SENSOR_C_PIN)) ? 1 : 0;
+ return rtn;
}
diff --git a/USR/SRC/Motor.c b/USR/SRC/Motor.c
index 514feb8..ca17a04 100644
--- a/USR/SRC/Motor.c
+++ b/USR/SRC/Motor.c
@@ -8,7 +8,8 @@
#include "SEGGER_RTT_Conf.h"
#include "SEGGER_RTT.h"
static volatile motor_rotate_t motor_drive = {0};
-static uint32_t motor_pluse = 0;
+static uint32_t motor_pluse = 1500;
+static volatile uint8_t motor_step = 0;
static void motor_phasechange(void);
static void update_speed_dir(uint8_t dir_in);
@@ -32,8 +33,8 @@
exti_interrupt_enable(HALL_A_EXTI);
exti_interrupt_enable(HALL_B_EXTI);
exti_interrupt_enable(HALL_C_EXTI);
- StartSpeedTime(); //start speed timer
- motor_phasechange(); // ִ��һ�λ���
+ StartSpeedTime(); //start speed timer
+ // motor_phasechange(); // ִ��һ�λ���
motor_drive.enable_flag = 1;
}
@@ -61,19 +62,19 @@
/* ��ȡ���������� U ��״̬ */
if (Get_HallSensorA_State())
{
- state |= 0x01U << 0;
+ state |= (0x01U << 0);
}
/* ��ȡ���������� V ��״̬ */
if (Get_HallSensorB_State())
{
- state |= 0x01U << 1;
+ state |= (0x01U << 1);
}
/* ��ȡ���������� W ��״̬ */
if (Get_HallSensorC_State())
{
- state |= 0x01U << 2;
+ state |= (0x01U << 2);
}
return state; // ���ش�����״̬
@@ -206,16 +207,21 @@
void HAL_HallExti_TriggerCallback(void)
{
uint8_t step = 0;
- step = get_hall_state();
- /* ��ȡ��������������״̬,��Ϊ��������� */
- if (exti_interrupt_flag_get(HALL_A_EXTI | HALL_B_EXTI | HALL_C_EXTI)) // �ж��Ƿ��ɴ����жϲ���
+
+ // /* ��ȡ��������������״̬,��Ϊ��������� */
+ // if (exti_interrupt_flag_get(HALL_A_EXTI | HALL_B_EXTI | HALL_C_EXTI)) // �ж��Ƿ��ɴ����жϲ���
+ // {
+
+ // // exti_interrupt_flag_clear(HALL_A_EXTI | HALL_B_EXTI | HALL_C_EXTI);
+ // }
+ for (step = 0; step < 30; step++)
{
- // update_motor_speed(step, __HAL_TIM_GET_COMPARE(htim, TIM_CHANNEL_1));//TODO ����ʱ������ü���ʱ��
- update_motor_speed(step, 300u * GetSpeedTimerOutcnt() + timer_counter_read(TIMER2));
- SEGGER_RTT_printf(0, "Speed is:%d!\n", motor_drive.speed);
- motor_drive.timeout = 0;
- exti_interrupt_flag_clear(HALL_A_EXTI | HALL_B_EXTI | HALL_C_EXTI);
}
+ motor_step = get_hall_state();
+ // update_motor_speed(step, __HAL_TIM_GET_COMPARE(htim, TIM_CHANNEL_1));//TODO ����ʱ������ü���ʱ��
+ // update_motor_speed(step, 300u * GetSpeedTimerOutcnt() + timer_counter_read(TIMER2));
+ SEGGER_RTT_printf(0, "Hall state is:%d!\n", motor_step);
+ motor_drive.timeout = 0;
// if (RESET != exti_interrupt_flag_get(EXTI_4))
// {
// SEGGER_RTT_printf(0, "HALL_A_EXTI triggle!\n");
@@ -228,7 +234,7 @@
// {
// SEGGER_RTT_printf(0, "HALL_B_EXTI triggle!\n");
// }
- motor_phasechange();
+ // motor_phasechange();
// HAL_TIM_GenerateEvent(&htimx_bldcm, TIM_EVENTSOURCE_COM); // ������������¼�����ʱ�Ž�����д��
}
@@ -245,7 +251,7 @@
/* next step: step 2 configuration .A-C` breakover---------------------------- */
case 1:
/* channel U configuration */
- timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM1);
+ timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM0);
timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_ENABLE);
MOTOR_U_L_DISABLE;
// timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_DISABLE);
@@ -256,7 +262,7 @@
// timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE);
/* channel W configuration */
- // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM1);
+ // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0);
timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_DISABLE);
MOTOR_W_L_ENABLE;
// timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_ENABLE);
@@ -272,13 +278,13 @@
MOTOR_U_L_DISABLE;
/* channel V configuration */
- timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM1);
+ timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0);
timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_ENABLE);
// timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE);
MOTOR_V_L_DISABLE;
/* channel W configuration */
- timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM1);
+ timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0);
timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_DISABLE);
// timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_ENABLE);
MOTOR_W_L_ENABLE;
@@ -289,13 +295,13 @@
/* next step: step 4 configuration .B-A` breakover---------------------------- */
case 3:
/* channel U configuration */
- timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM1);
+ timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM0);
timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE);
// timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_ENABLE);
MOTOR_U_L_ENABLE;
/* channel V configuration */
- timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM1);
+ timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0);
timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_ENABLE);
// timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE);
MOTOR_V_L_DISABLE;
@@ -311,7 +317,7 @@
/* next step: step 5 configuration .C-A` breakover---------------------------- */
case 4:
/* channel U configuration */
- timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM1);
+ timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM0);
timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE);
// timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_ENABLE);
MOTOR_U_L_ENABLE;
@@ -322,7 +328,7 @@
MOTOR_V_L_DISABLE;
/* channel W configuration */
- timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM1);
+ timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0);
timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_ENABLE);
// timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE);
MOTOR_W_L_DISABLE;
@@ -338,13 +344,13 @@
MOTOR_U_L_DISABLE;
/* channel V configuration */
- timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM1);
+ timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0);
timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE);
// timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_ENABLE);
MOTOR_V_L_ENABLE;
/* channel W configuration */
- timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM1);
+ timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0);
timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_ENABLE);
// timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE);
MOTOR_W_L_DISABLE;
@@ -354,13 +360,13 @@
/* next step: step 1 configuration .A-B` breakover---------------------------- */
case 6:
/* channel U configuration */
- timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM1);
+ timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM0);
timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_ENABLE);
// timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_DISABLE);
MOTOR_U_L_DISABLE;
/* channel V configuration */
- timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM1);
+ timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0);
timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE);
// timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_ENABLE);
MOTOR_V_L_ENABLE;
@@ -383,11 +389,14 @@
extern void stop_pwm_output(void)
{
timer_channel_output_state_config(TIMER0, TIMER_CH_0, TIMER_CCX_DISABLE);
- timer_channel_complementary_output_state_config(TIMER0, TIMER_CH_0, TIMER_CCXN_DISABLE);
+ // timer_channel_complementary_output_state_config(TIMER0, TIMER_CH_0, TIMER_CCXN_DISABLE);
timer_channel_output_state_config(TIMER0, TIMER_CH_1, TIMER_CCX_DISABLE);
- timer_channel_complementary_output_state_config(TIMER0, TIMER_CH_1, TIMER_CCXN_DISABLE);
+ // timer_channel_complementary_output_state_config(TIMER0, TIMER_CH_1, TIMER_CCXN_DISABLE);
timer_channel_output_state_config(TIMER0, TIMER_CH_2, TIMER_CCX_DISABLE);
- timer_channel_complementary_output_state_config(TIMER0, TIMER_CH_2, TIMER_CCXN_DISABLE);
+ // timer_channel_complementary_output_state_config(TIMER0, TIMER_CH_2, TIMER_CCXN_DISABLE);
+ MOTOR_W_L_DISABLE;
+ MOTOR_V_L_DISABLE;
+ MOTOR_U_L_DISABLE;
}
/**
@@ -399,7 +408,10 @@
{
/* ���ö�ʱ��ͨ����� PWM ��ռ�ձ� */
motor_pluse = pulse;
- //SetPwmDuty();
+ SetPwmDuty(TIMER_CH_0, motor_pluse);
+ SetPwmDuty(TIMER_CH_1, motor_pluse);
+ SetPwmDuty(TIMER_CH_2, motor_pluse);
+
if (motor_drive.enable_flag)
{
motor_phasechange();
diff --git a/USR/SRC/bldc_ctrl.c b/USR/SRC/bldc_ctrl.c
index 2f3d428..322ce9c 100644
--- a/USR/SRC/bldc_ctrl.c
+++ b/USR/SRC/bldc_ctrl.c
@@ -22,7 +22,12 @@
{
// PWM_TIMx_Configuration(); // ������ƶ�ʱ�������ų�ʼ��
// hall_tim_config(); // ������������ʼ��
- sd_gpio_config(); // sd ���ų�ʼ��
+ // sd_gpio_config(); // sd ���ų�ʼ��
+ // Set_SDH2136_Enable();
+ Set_SDH2136_Disable();
+ bldcm_data.direction = MOTOR_FWD;
+ bldcm_data.is_enable = 1;
+ bldcm_data.dutyfactor = 1500;
}
/**
diff --git a/USR/SRC/gd32e23x_it.c b/USR/SRC/gd32e23x_it.c
index 85acfff..cb0933d 100644
--- a/USR/SRC/gd32e23x_it.c
+++ b/USR/SRC/gd32e23x_it.c
@@ -157,9 +157,8 @@
if (RESET != exti_interrupt_flag_get(EXTI_4 | EXTI_5 | EXTI_15))
{
HAL_HallExti_TriggerCallback();
+ exti_interrupt_flag_clear(EXTI_4 | EXTI_5 | EXTI_15);
}
-
- exti_interrupt_flag_clear(EXTI_4 | EXTI_5 | EXTI_15);
}
/*!
diff --git a/USR/SRC/main.c b/USR/SRC/main.c
index a70f892..e8e0e54 100644
--- a/USR/SRC/main.c
+++ b/USR/SRC/main.c
@@ -10,9 +10,14 @@
#include "bsp_pid.h"
#include "os_task.h"
#include "RttTask.h"
+#include "SEGGER_RTT_Conf.h"
+#include "SEGGER_RTT.h"
static void Comm_Task(void *p)
{
+ // uint8_t step = 0;
+ // step = get_hall_state();
+ // SEGGER_RTT_printf(0, "Hall state is:%d!\n", step);
}
int main()
diff --git a/USR/SRC/pwm.c b/USR/SRC/pwm.c
index b30d6e5..13d33dc 100644
--- a/USR/SRC/pwm.c
+++ b/USR/SRC/pwm.c
@@ -48,7 +48,7 @@
*****************************************************************************************************/
static void Timer0Init(void)
{
- uint16_t Duty = PERIOD_CMP / 10;
+ uint16_t Duty = PERIOD_CMP / 2;
timer_parameter_struct timercontralcfg;
timer_oc_parameter_struct timeroutcfg[3];
timer_break_parameter_struct timer_breakpara;
@@ -90,25 +90,25 @@
timer_channel_output_pulse_value_config(TIMER0, TIMER_CH_1, Duty);
timer_channel_output_pulse_value_config(TIMER0, TIMER_CH_2, Duty);
- timer_channel_output_mode_config(TIMER0, TIMER_CH_0, TIMER_OC_MODE_PWM1); //set pwm1 mode first low then high
- timer_channel_output_mode_config(TIMER0, TIMER_CH_1, TIMER_OC_MODE_PWM1);
- timer_channel_output_mode_config(TIMER0, TIMER_CH_2, TIMER_OC_MODE_PWM1);
+ timer_channel_output_mode_config(TIMER0, TIMER_CH_0, TIMER_OC_MODE_PWM0); //set pwm1 mode first low then high
+ timer_channel_output_mode_config(TIMER0, TIMER_CH_1, TIMER_OC_MODE_PWM0);
+ timer_channel_output_mode_config(TIMER0, TIMER_CH_2, TIMER_OC_MODE_PWM0);
timer_channel_output_shadow_config(TIMER0, TIMER_CH_0, TIMER_OC_SHADOW_ENABLE); //shadow ENable
timer_channel_output_shadow_config(TIMER0, TIMER_CH_1, TIMER_OC_SHADOW_ENABLE);
timer_channel_output_shadow_config(TIMER0, TIMER_CH_2, TIMER_OC_SHADOW_ENABLE);
- /* configure TIMER break function */
- timer_break_struct_para_init(&timer_breakpara);
- /* automatic output enable, break, dead time and lock configuration*/
- timer_breakpara.runoffstate = TIMER_ROS_STATE_DISABLE;
- timer_breakpara.ideloffstate = TIMER_IOS_STATE_DISABLE;
- timer_breakpara.deadtime = 255;
- timer_breakpara.breakpolarity = TIMER_BREAK_POLARITY_LOW;
- timer_breakpara.outputautostate = TIMER_OUTAUTO_ENABLE;
- timer_breakpara.protectmode = TIMER_CCHP_PROT_0;
- timer_breakpara.breakstate = TIMER_BREAK_ENABLE;
- timer_break_config(TIMER0, &timer_breakpara);
+ // /* configure TIMER break function */
+ // timer_break_struct_para_init(&timer_breakpara);
+ // /* automatic output enable, break, dead time and lock configuration*/
+ // timer_breakpara.runoffstate = TIMER_ROS_STATE_DISABLE;
+ // timer_breakpara.ideloffstate = TIMER_IOS_STATE_DISABLE;
+ // timer_breakpara.deadtime = 32;
+ // timer_breakpara.breakpolarity = TIMER_BREAK_POLARITY_LOW;
+ // timer_breakpara.outputautostate = TIMER_OUTAUTO_ENABLE;
+ // timer_breakpara.protectmode = TIMER_CCHP_PROT_0;
+ // timer_breakpara.breakstate = TIMER_BREAK_DISABLE;
+ // timer_break_config(TIMER0, &timer_breakpara);
timer_primary_output_config(TIMER0, ENABLE);
timer_auto_reload_shadow_enable(TIMER0);
@@ -125,7 +125,7 @@
void SetPwmDuty(uint16_t ch, uint32_t duty)
{
- uint32_t duty_temp = (PERIOD_CMP >= duty) ? (PERIOD_CMP - duty) : 0;
+ // uint32_t duty_temp = (PERIOD_CMP >= duty) ? (PERIOD_CMP - duty) : 0;
timer_channel_output_pulse_value_config(TIMER0, ch, duty);
}
--
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