From 4a89e24804b91902def506a9e898293fa36ccb59 Mon Sep 17 00:00:00 2001
From: tao_z <tzj0429@163.com>
Date: Sat, 10 Jul 2021 11:52:25 +0800
Subject: [PATCH] 待调试电机转动
---
USR/SRC/Motor.c | 193 +++++++++++++++++++++++-------------------------
USR/INC/motor.h | 6
USR/INC/gpio.h | 10 +-
USR/SRC/bldc_ctrl.c | 4
USR/SRC/GPIO.c | 7 +
USR/SRC/pwm.c | 6
6 files changed, 110 insertions(+), 116 deletions(-)
diff --git a/USR/INC/gpio.h b/USR/INC/gpio.h
index e54afdf..3d5a772 100644
--- a/USR/INC/gpio.h
+++ b/USR/INC/gpio.h
@@ -22,12 +22,12 @@
#define LED_PORT GPIOA
#define LED_PIN GPIO_PIN_11
-#define HALL_SENSOR_A_PORT GPIOB
-#define HALL_SENSOR_A_PIN GPIO_PIN_4
#define HALL_SENSOR_C_PORT GPIOB
-#define HALL_SENSOR_C_PIN GPIO_PIN_5
-#define HALL_SENSOR_B_PORT GPIOA
-#define HALL_SENSOR_B_PIN GPIO_PIN_15
+#define HALL_SENSOR_C_PIN GPIO_PIN_4
+#define HALL_SENSOR_B_PORT GPIOB
+#define HALL_SENSOR_B_PIN GPIO_PIN_5
+#define HALL_SENSOR_A_PORT GPIOA
+#define HALL_SENSOR_A_PIN GPIO_PIN_15
//����ADC����
#define CURRENT_AI_PORT GPIOA
diff --git a/USR/INC/motor.h b/USR/INC/motor.h
index 701ee7c..fb8190d 100644
--- a/USR/INC/motor.h
+++ b/USR/INC/motor.h
@@ -24,9 +24,9 @@
���� T = 30ms */
#define HALL_PRESCALER_COUNT (110)
-#define HALL_A_EXTI (EXTI_4)
-#define HALL_C_EXTI (EXTI_5)
-#define HALL_B_EXTI (EXTI_15)
+#define HALL_C_EXTI (EXTI_4)
+#define HALL_B_EXTI (EXTI_5)
+#define HALL_A_EXTI (EXTI_15)
#define MOTOR_OUT_CH_U (TIMER_CH_1)
#define MOTOR_OUT_CH_V (TIMER_CH_0)
diff --git a/USR/SRC/GPIO.c b/USR/SRC/GPIO.c
index c4226b4..57be080 100644
--- a/USR/SRC/GPIO.c
+++ b/USR/SRC/GPIO.c
@@ -9,6 +9,7 @@
// rcu_periph_clock_enable(RCU_GPIOF);
/* enable the CFGCMP clock */
rcu_periph_clock_enable(RCU_CFGCMP);
+ exti_deinit();
//初始化配置霍尔输入引脚
gpio_mode_set(HALL_SENSOR_A_PORT, GPIO_MODE_INPUT, GPIO_PUPD_NONE, HALL_SENSOR_A_PIN);
gpio_mode_set(HALL_SENSOR_B_PORT, GPIO_MODE_INPUT, GPIO_PUPD_NONE, HALL_SENSOR_B_PIN);
@@ -19,9 +20,9 @@
syscfg_exti_line_config(EXTI_SOURCE_GPIOB, EXTI_SOURCE_PIN5);
syscfg_exti_line_config(EXTI_SOURCE_GPIOA, EXTI_SOURCE_PIN15);
- exti_init(EXTI_4, EXTI_INTERRUPT, EXTI_TRIG_RISING); //配置外部上升沿中断
- exti_init(EXTI_5, EXTI_INTERRUPT, EXTI_TRIG_RISING); //配置外部上升沿中断
- exti_init(EXTI_15, EXTI_INTERRUPT, EXTI_TRIG_RISING); //配置外部上升沿中断
+ exti_init(EXTI_4, EXTI_INTERRUPT, EXTI_TRIG_BOTH); //配置外部上升沿中断
+ exti_init(EXTI_5, EXTI_INTERRUPT, EXTI_TRIG_BOTH); //配置外部上升沿中断
+ exti_init(EXTI_15, EXTI_INTERRUPT, EXTI_TRIG_BOTH); //配置外部上升沿中断
nvic_irq_enable(EXTI4_15_IRQn, 0U);
exti_interrupt_flag_clear(EXTI_4 | EXTI_5 | EXTI_15);
diff --git a/USR/SRC/Motor.c b/USR/SRC/Motor.c
index ca17a04..c65a3fa 100644
--- a/USR/SRC/Motor.c
+++ b/USR/SRC/Motor.c
@@ -33,8 +33,8 @@
exti_interrupt_enable(HALL_A_EXTI);
exti_interrupt_enable(HALL_B_EXTI);
exti_interrupt_enable(HALL_C_EXTI);
- StartSpeedTime(); //start speed timer
- // motor_phasechange(); // ִ��һ�λ���
+ StartSpeedTime(); //start speed timer
+ motor_phasechange(); // ִ��һ�λ���
motor_drive.enable_flag = 1;
}
@@ -207,21 +207,17 @@
void HAL_HallExti_TriggerCallback(void)
{
uint8_t step = 0;
-
- // /* ��ȡ��������������״̬,��Ϊ��������� */
- // if (exti_interrupt_flag_get(HALL_A_EXTI | HALL_B_EXTI | HALL_C_EXTI)) // �ж��Ƿ��ɴ����жϲ���
- // {
-
- // // exti_interrupt_flag_clear(HALL_A_EXTI | HALL_B_EXTI | HALL_C_EXTI);
- // }
- for (step = 0; step < 30; step++)
- {
- }
motor_step = get_hall_state();
- // update_motor_speed(step, __HAL_TIM_GET_COMPARE(htim, TIM_CHANNEL_1));//TODO ����ʱ������ü���ʱ��
- // update_motor_speed(step, 300u * GetSpeedTimerOutcnt() + timer_counter_read(TIMER2));
- SEGGER_RTT_printf(0, "Hall state is:%d!\n", motor_step);
- motor_drive.timeout = 0;
+ // /* ��ȡ��������������״̬,��Ϊ��������� */
+ if (exti_interrupt_flag_get(HALL_A_EXTI | HALL_B_EXTI | HALL_C_EXTI)) // �ж��Ƿ��ɴ����жϲ���
+ {
+ // update_motor_speed(step, __HAL_TIM_GET_COMPARE(htim, TIM_CHANNEL_1)); //TODO ����ʱ������ü���ʱ��
+ update_motor_speed(motor_step, 300u * GetSpeedTimerOutcnt() + timer_counter_read(TIMER2));
+ SEGGER_RTT_printf(0, "Hall state is:%d!\n", motor_step);
+ motor_drive.timeout = 0;
+ // // exti_interrupt_flag_clear(HALL_A_EXTI | HALL_B_EXTI | HALL_C_EXTI);
+ }
+
// if (RESET != exti_interrupt_flag_get(EXTI_4))
// {
// SEGGER_RTT_printf(0, "HALL_A_EXTI triggle!\n");
@@ -234,7 +230,7 @@
// {
// SEGGER_RTT_printf(0, "HALL_B_EXTI triggle!\n");
// }
- // motor_phasechange();
+ motor_phasechange();
// HAL_TIM_GenerateEvent(&htimx_bldcm, TIM_EVENTSOURCE_COM); // ������������¼�����ʱ�Ž�����д��
}
@@ -248,105 +244,61 @@
}
switch (step)
{
- /* next step: step 2 configuration .A-C` breakover---------------------------- */
+ /* next step: step 3 configuration .W-U` breakover---------------------------- */
case 1:
/* channel U configuration */
- timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM0);
- timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_ENABLE);
- MOTOR_U_L_DISABLE;
+
+ timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE);
+ MOTOR_U_L_ENABLE;
// timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_DISABLE);
/* channel V configuration */
timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE);
MOTOR_V_L_DISABLE;
// timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE);
-
- /* channel W configuration */
- // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0);
- timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_DISABLE);
- MOTOR_W_L_ENABLE;
- // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_ENABLE);
-
- step++;
- break;
-
- /* next step: step 3 configuration .B-C` breakover---------------------------- */
- case 2:
- /* channel U configuration */
- timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE);
- timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_DISABLE);
- MOTOR_U_L_DISABLE;
-
- /* channel V configuration */
- timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0);
- timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_ENABLE);
- // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE);
- MOTOR_V_L_DISABLE;
-
- /* channel W configuration */
- timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0);
- timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_DISABLE);
- // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_ENABLE);
- MOTOR_W_L_ENABLE;
-
- step++;
- break;
-
- /* next step: step 4 configuration .B-A` breakover---------------------------- */
- case 3:
- /* channel U configuration */
- timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM0);
- timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE);
- // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_ENABLE);
- MOTOR_U_L_ENABLE;
-
- /* channel V configuration */
- timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0);
- timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_ENABLE);
- // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE);
- MOTOR_V_L_DISABLE;
-
- /* channel W configuration */
- timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_DISABLE);
- // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE);
- MOTOR_W_L_DISABLE;
-
- step++;
- break;
-
- /* next step: step 5 configuration .C-A` breakover---------------------------- */
- case 4:
- /* channel U configuration */
- timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM0);
- timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE);
- // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_ENABLE);
- MOTOR_U_L_ENABLE;
-
- /* channel V configuration */
- timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE);
- // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE);
- MOTOR_V_L_DISABLE;
/* channel W configuration */
timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0);
timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_ENABLE);
- // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE);
MOTOR_W_L_DISABLE;
+ // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_ENABLE);
- step++;
break;
- /* next step: step 6 configuration .C-B` breakover---------------------------- */
- case 5:
+ /* next step: step 6 configuration .u-v` breakover---------------------------- */
+ case 2:
/* channel U configuration */
- timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE);
+ timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM0);
+ timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_ENABLE);
// timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_DISABLE);
MOTOR_U_L_DISABLE;
/* channel V configuration */
- timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0);
+ // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0);
timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE);
- // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_ENABLE);
+ // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE);
+ MOTOR_V_L_ENABLE;
+
+ /* channel W configuration */
+ // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0);
+ timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_DISABLE);
+ // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_ENABLE);
+ MOTOR_W_L_DISABLE;
+
+ break;
+
+ /* next step: step 2 configuration .W-V` breakover---------------------------- */
+ case 3:
+ /* channel U configuration */
+ // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM0);
+ timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE);
+ // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_ENABLE);
+ MOTOR_U_L_DISABLE;
+
+ /* channel V configuration */
+ // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0);
+ timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE);
+ // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE);
MOTOR_V_L_ENABLE;
/* channel W configuration */
@@ -354,10 +306,52 @@
timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_ENABLE);
// timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE);
MOTOR_W_L_DISABLE;
- step++;
+
break;
- /* next step: step 1 configuration .A-B` breakover---------------------------- */
+ /* next step: step 5 configuration .V-W` breakover---------------------------- */
+ case 4:
+ /* channel U configuration */
+ // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM0);
+ timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE);
+ // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_ENABLE);
+ MOTOR_U_L_DISABLE;
+
+ /* channel V configuration */
+ timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0);
+ timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_ENABLE);
+ // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE);
+ MOTOR_V_L_DISABLE;
+
+ /* channel W configuration */
+ // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0);
+ timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE);
+ // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE);
+ MOTOR_W_L_ENABLE;
+
+ break;
+
+ /* next step: step 1 configuration .V-U` breakover---------------------------- */
+ case 5:
+ /* channel U configuration */
+ timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE);
+ // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_DISABLE);
+ MOTOR_U_L_ENABLE;
+
+ /* channel V configuration */
+ timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0);
+ timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_ENABLE);
+ // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_ENABLE);
+ MOTOR_V_L_DISABLE;
+
+ /* channel W configuration */
+ // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0);
+ timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE);
+ // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE);
+ MOTOR_W_L_DISABLE;
+ break;
+
+ /* next step: step 4 configuration .U-W` breakover---------------------------- */
case 6:
/* channel U configuration */
timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM0);
@@ -366,17 +360,16 @@
MOTOR_U_L_DISABLE;
/* channel V configuration */
- timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0);
+ // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0);
timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE);
// timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_ENABLE);
- MOTOR_V_L_ENABLE;
+ MOTOR_V_L_DISABLE;
/* channel W configuration */
timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_DISABLE);
// timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE);
- MOTOR_W_L_DISABLE;
+ MOTOR_W_L_ENABLE;
- step = 1;
break;
}
}
diff --git a/USR/SRC/bldc_ctrl.c b/USR/SRC/bldc_ctrl.c
index 322ce9c..cb1fd5d 100644
--- a/USR/SRC/bldc_ctrl.c
+++ b/USR/SRC/bldc_ctrl.c
@@ -23,8 +23,8 @@
// PWM_TIMx_Configuration(); // ������ƶ�ʱ�������ų�ʼ��
// hall_tim_config(); // ������������ʼ��
// sd_gpio_config(); // sd ���ų�ʼ��
- // Set_SDH2136_Enable();
- Set_SDH2136_Disable();
+ Set_SDH2136_Enable();
+ // Set_SDH2136_Disable();
bldcm_data.direction = MOTOR_FWD;
bldcm_data.is_enable = 1;
bldcm_data.dutyfactor = 1500;
diff --git a/USR/SRC/pwm.c b/USR/SRC/pwm.c
index 13d33dc..e33156e 100644
--- a/USR/SRC/pwm.c
+++ b/USR/SRC/pwm.c
@@ -94,9 +94,9 @@
timer_channel_output_mode_config(TIMER0, TIMER_CH_1, TIMER_OC_MODE_PWM0);
timer_channel_output_mode_config(TIMER0, TIMER_CH_2, TIMER_OC_MODE_PWM0);
- timer_channel_output_shadow_config(TIMER0, TIMER_CH_0, TIMER_OC_SHADOW_ENABLE); //shadow ENable
- timer_channel_output_shadow_config(TIMER0, TIMER_CH_1, TIMER_OC_SHADOW_ENABLE);
- timer_channel_output_shadow_config(TIMER0, TIMER_CH_2, TIMER_OC_SHADOW_ENABLE);
+ timer_channel_output_shadow_config(TIMER0, TIMER_CH_0, TIMER_OC_SHADOW_DISABLE); //shadow ENable
+ timer_channel_output_shadow_config(TIMER0, TIMER_CH_1, TIMER_OC_SHADOW_DISABLE);
+ timer_channel_output_shadow_config(TIMER0, TIMER_CH_2, TIMER_OC_SHADOW_DISABLE);
// /* configure TIMER break function */
// timer_break_struct_para_init(&timer_breakpara);
--
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