From 4a89e24804b91902def506a9e898293fa36ccb59 Mon Sep 17 00:00:00 2001
From: tao_z <tzj0429@163.com>
Date: Sat, 10 Jul 2021 11:52:25 +0800
Subject: [PATCH] 待调试电机转动
---
USR/SRC/Motor.c | 193 +++++++++++++++++++++++-------------------------
1 files changed, 93 insertions(+), 100 deletions(-)
diff --git a/USR/SRC/Motor.c b/USR/SRC/Motor.c
index ca17a04..c65a3fa 100644
--- a/USR/SRC/Motor.c
+++ b/USR/SRC/Motor.c
@@ -33,8 +33,8 @@
exti_interrupt_enable(HALL_A_EXTI);
exti_interrupt_enable(HALL_B_EXTI);
exti_interrupt_enable(HALL_C_EXTI);
- StartSpeedTime(); //start speed timer
- // motor_phasechange(); // ִ��һ�λ���
+ StartSpeedTime(); //start speed timer
+ motor_phasechange(); // ִ��һ�λ���
motor_drive.enable_flag = 1;
}
@@ -207,21 +207,17 @@
void HAL_HallExti_TriggerCallback(void)
{
uint8_t step = 0;
-
- // /* ��ȡ��������������״̬,��Ϊ��������� */
- // if (exti_interrupt_flag_get(HALL_A_EXTI | HALL_B_EXTI | HALL_C_EXTI)) // �ж��Ƿ��ɴ����жϲ���
- // {
-
- // // exti_interrupt_flag_clear(HALL_A_EXTI | HALL_B_EXTI | HALL_C_EXTI);
- // }
- for (step = 0; step < 30; step++)
- {
- }
motor_step = get_hall_state();
- // update_motor_speed(step, __HAL_TIM_GET_COMPARE(htim, TIM_CHANNEL_1));//TODO ����ʱ������ü���ʱ��
- // update_motor_speed(step, 300u * GetSpeedTimerOutcnt() + timer_counter_read(TIMER2));
- SEGGER_RTT_printf(0, "Hall state is:%d!\n", motor_step);
- motor_drive.timeout = 0;
+ // /* ��ȡ��������������״̬,��Ϊ��������� */
+ if (exti_interrupt_flag_get(HALL_A_EXTI | HALL_B_EXTI | HALL_C_EXTI)) // �ж��Ƿ��ɴ����жϲ���
+ {
+ // update_motor_speed(step, __HAL_TIM_GET_COMPARE(htim, TIM_CHANNEL_1)); //TODO ����ʱ������ü���ʱ��
+ update_motor_speed(motor_step, 300u * GetSpeedTimerOutcnt() + timer_counter_read(TIMER2));
+ SEGGER_RTT_printf(0, "Hall state is:%d!\n", motor_step);
+ motor_drive.timeout = 0;
+ // // exti_interrupt_flag_clear(HALL_A_EXTI | HALL_B_EXTI | HALL_C_EXTI);
+ }
+
// if (RESET != exti_interrupt_flag_get(EXTI_4))
// {
// SEGGER_RTT_printf(0, "HALL_A_EXTI triggle!\n");
@@ -234,7 +230,7 @@
// {
// SEGGER_RTT_printf(0, "HALL_B_EXTI triggle!\n");
// }
- // motor_phasechange();
+ motor_phasechange();
// HAL_TIM_GenerateEvent(&htimx_bldcm, TIM_EVENTSOURCE_COM); // ������������¼�����ʱ�Ž�����д��
}
@@ -248,105 +244,61 @@
}
switch (step)
{
- /* next step: step 2 configuration .A-C` breakover---------------------------- */
+ /* next step: step 3 configuration .W-U` breakover---------------------------- */
case 1:
/* channel U configuration */
- timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM0);
- timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_ENABLE);
- MOTOR_U_L_DISABLE;
+
+ timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE);
+ MOTOR_U_L_ENABLE;
// timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_DISABLE);
/* channel V configuration */
timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE);
MOTOR_V_L_DISABLE;
// timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE);
-
- /* channel W configuration */
- // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0);
- timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_DISABLE);
- MOTOR_W_L_ENABLE;
- // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_ENABLE);
-
- step++;
- break;
-
- /* next step: step 3 configuration .B-C` breakover---------------------------- */
- case 2:
- /* channel U configuration */
- timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE);
- timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_DISABLE);
- MOTOR_U_L_DISABLE;
-
- /* channel V configuration */
- timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0);
- timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_ENABLE);
- // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE);
- MOTOR_V_L_DISABLE;
-
- /* channel W configuration */
- timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0);
- timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_DISABLE);
- // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_ENABLE);
- MOTOR_W_L_ENABLE;
-
- step++;
- break;
-
- /* next step: step 4 configuration .B-A` breakover---------------------------- */
- case 3:
- /* channel U configuration */
- timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM0);
- timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE);
- // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_ENABLE);
- MOTOR_U_L_ENABLE;
-
- /* channel V configuration */
- timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0);
- timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_ENABLE);
- // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE);
- MOTOR_V_L_DISABLE;
-
- /* channel W configuration */
- timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_DISABLE);
- // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE);
- MOTOR_W_L_DISABLE;
-
- step++;
- break;
-
- /* next step: step 5 configuration .C-A` breakover---------------------------- */
- case 4:
- /* channel U configuration */
- timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM0);
- timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE);
- // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_ENABLE);
- MOTOR_U_L_ENABLE;
-
- /* channel V configuration */
- timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE);
- // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE);
- MOTOR_V_L_DISABLE;
/* channel W configuration */
timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0);
timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_ENABLE);
- // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE);
MOTOR_W_L_DISABLE;
+ // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_ENABLE);
- step++;
break;
- /* next step: step 6 configuration .C-B` breakover---------------------------- */
- case 5:
+ /* next step: step 6 configuration .u-v` breakover---------------------------- */
+ case 2:
/* channel U configuration */
- timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE);
+ timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM0);
+ timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_ENABLE);
// timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_DISABLE);
MOTOR_U_L_DISABLE;
/* channel V configuration */
- timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0);
+ // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0);
timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE);
- // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_ENABLE);
+ // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE);
+ MOTOR_V_L_ENABLE;
+
+ /* channel W configuration */
+ // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0);
+ timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_DISABLE);
+ // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_ENABLE);
+ MOTOR_W_L_DISABLE;
+
+ break;
+
+ /* next step: step 2 configuration .W-V` breakover---------------------------- */
+ case 3:
+ /* channel U configuration */
+ // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM0);
+ timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE);
+ // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_ENABLE);
+ MOTOR_U_L_DISABLE;
+
+ /* channel V configuration */
+ // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0);
+ timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE);
+ // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE);
MOTOR_V_L_ENABLE;
/* channel W configuration */
@@ -354,10 +306,52 @@
timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_ENABLE);
// timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE);
MOTOR_W_L_DISABLE;
- step++;
+
break;
- /* next step: step 1 configuration .A-B` breakover---------------------------- */
+ /* next step: step 5 configuration .V-W` breakover---------------------------- */
+ case 4:
+ /* channel U configuration */
+ // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM0);
+ timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE);
+ // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_ENABLE);
+ MOTOR_U_L_DISABLE;
+
+ /* channel V configuration */
+ timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0);
+ timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_ENABLE);
+ // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE);
+ MOTOR_V_L_DISABLE;
+
+ /* channel W configuration */
+ // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0);
+ timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE);
+ // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE);
+ MOTOR_W_L_ENABLE;
+
+ break;
+
+ /* next step: step 1 configuration .V-U` breakover---------------------------- */
+ case 5:
+ /* channel U configuration */
+ timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE);
+ // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_DISABLE);
+ MOTOR_U_L_ENABLE;
+
+ /* channel V configuration */
+ timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0);
+ timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_ENABLE);
+ // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_ENABLE);
+ MOTOR_V_L_DISABLE;
+
+ /* channel W configuration */
+ // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0);
+ timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE);
+ // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE);
+ MOTOR_W_L_DISABLE;
+ break;
+
+ /* next step: step 4 configuration .U-W` breakover---------------------------- */
case 6:
/* channel U configuration */
timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM0);
@@ -366,17 +360,16 @@
MOTOR_U_L_DISABLE;
/* channel V configuration */
- timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0);
+ // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0);
timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE);
// timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_ENABLE);
- MOTOR_V_L_ENABLE;
+ MOTOR_V_L_DISABLE;
/* channel W configuration */
timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_DISABLE);
// timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE);
- MOTOR_W_L_DISABLE;
+ MOTOR_W_L_ENABLE;
- step = 1;
break;
}
}
--
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