From 82e38738a4d532cc3d56cbf80c1a4093f23cdd6a Mon Sep 17 00:00:00 2001 From: tao_z <tzj0429@163.com> Date: Wed, 14 Jul 2021 07:01:42 +0800 Subject: [PATCH] 调整时钟64MHz。 RTT任务增加马达开启和关闭功能 --- USR/SRC/Motor.c | 207 ++++++++++++++++++++++++++++++++------------------- 1 files changed, 129 insertions(+), 78 deletions(-) diff --git a/USR/SRC/Motor.c b/USR/SRC/Motor.c index 4bb7783..13f4768 100644 --- a/USR/SRC/Motor.c +++ b/USR/SRC/Motor.c @@ -5,8 +5,11 @@ #include "bldc_ctrl.h" #include "pwm.h" #include "string.h" +#include "SEGGER_RTT_Conf.h" +#include "SEGGER_RTT.h" static volatile motor_rotate_t motor_drive = {0}; -static uint32_t motor_pluse = 0; +static uint32_t motor_pluse = 1500; +static volatile uint8_t motor_step = 0; static void motor_phasechange(void); static void update_speed_dir(uint8_t dir_in); @@ -15,7 +18,10 @@ motor_drive.timeout = 0; motor_drive.speed = 0; motor_drive.enable_flag = 0; + motor_pluse = 0; memset(motor_drive.speed_group, 0, SPEED_FILTER_NUM); + + // hall_enable(); }; /** * @brief ʹ�ܻ��������� @@ -57,19 +63,19 @@ /* ��ȡ���������� U ��״̬ */ if (Get_HallSensorA_State()) { - state |= 0x01U << 0; + state |= (0x01U << 0); } /* ��ȡ���������� V ��״̬ */ if (Get_HallSensorB_State()) { - state |= 0x01U << 1; + state |= (0x01U << 1); } /* ��ȡ���������� W ��״̬ */ if (Get_HallSensorC_State()) { - state |= 0x01U << 2; + state |= (0x01U << 2); } return state; // ���ش�����״̬ @@ -82,15 +88,16 @@ float f = 0; /* �����ٶȣ� - ���ÿתһȦ����12�����壬(1.0/(64000000.0/6400)Ϊ�����������ڣ�(1.0/(48000000.0/6400) * time)Ϊʱ�䳤�� + ���ÿתһȦ����12�����壬(1.0/(64000000.0/6400)Ϊ�����������ڣ�(1.0/(64000000.0/6400) * time)Ϊʱ�䳤�� */ if (time == 0) motor_drive.speed_group[count++] = 0; else { - f = (1.0f / (64000000.0f / SPEED_PRESCALER_COUNT) * time); - f = (1.0f / 12.0f) / (f / 60.0f); + // f = (1.0f / (64000000.0f / SPEED_PRESCALER_COUNT) * time); + // f = (1.0f / 12.0f) / (f / 60.0f); + f = time; motor_drive.speed_group[count++] = f; } update_speed_dir(dir_in); @@ -200,12 +207,15 @@ */ void HAL_HallExti_TriggerCallback(void) { - /* ��ȡ��������������״̬,��Ϊ��������� */ + uint8_t step = 0; + motor_step = get_hall_state(); + // /* ��ȡ��������������״̬,��Ϊ��������� */ if (exti_interrupt_flag_get(HALL_A_EXTI | HALL_B_EXTI | HALL_C_EXTI)) // �ж��Ƿ��ɴ����жϲ��� { - // update_motor_speed(step, __HAL_TIM_GET_COMPARE(htim, TIM_CHANNEL_1));//TODO ����ʱ������ü���ʱ�� + // update_motor_speed(motor_step, 300u * GetSpeedTimerOutcnt() + timer_counter_read(TIMER2)); + SEGGER_RTT_printf(0, "motor speed is:%d,%d!\n", GetSpeedTimerOutcnt(), timer_counter_read(TIMER2)); + timer_counter_value_config(TIMER2, 0); motor_drive.timeout = 0; - exti_interrupt_flag_clear(HALL_A_EXTI | HALL_B_EXTI | HALL_C_EXTI); } motor_phasechange(); // HAL_TIM_GenerateEvent(&htimx_bldcm, TIM_EVENTSOURCE_COM); // ������������¼�����ʱ�Ž�����д�� @@ -221,118 +231,150 @@ } switch (step) { - /* next step: step 2 configuration .A-C` breakover---------------------------- */ + /* next step: step 3 configuration .W-U` breakover---------------------------- */ case 1: /* channel U configuration */ - timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM1); - timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_ENABLE); - timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_DISABLE); + + // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE); + SetPwmDuty(MOTOR_OUT_CH_U, 0); + MOTOR_U_L_ENABLE; + // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_DISABLE); /* channel V configuration */ - timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE); - timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE); + // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE); + SetPwmDuty(MOTOR_OUT_CH_V, 0); + MOTOR_V_L_DISABLE; + // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE); /* channel W configuration */ - timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM1); - timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_DISABLE); - timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_ENABLE); + // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0); + // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_ENABLE); + SetPwmDuty(MOTOR_OUT_CH_W, motor_pluse); + MOTOR_W_L_DISABLE; + // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_ENABLE); - step++; break; - /* next step: step 3 configuration .B-C` breakover---------------------------- */ + /* next step: step 6 configuration .u-v` breakover---------------------------- */ case 2: /* channel U configuration */ - timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE); - timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_DISABLE); + // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM0); + // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_ENABLE); + SetPwmDuty(MOTOR_OUT_CH_U, motor_pluse); + // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_DISABLE); + MOTOR_U_L_DISABLE; /* channel V configuration */ - timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM1); - timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_ENABLE); - timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE); + // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0); + // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE); + SetPwmDuty(MOTOR_OUT_CH_V, 0); + // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE); + MOTOR_V_L_ENABLE; /* channel W configuration */ - timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM1); - timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_DISABLE); - timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_ENABLE); + // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0); + // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_DISABLE); + SetPwmDuty(MOTOR_OUT_CH_W, 0); + // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_ENABLE); + MOTOR_W_L_DISABLE; - step++; break; - /* next step: step 4 configuration .B-A` breakover---------------------------- */ + /* next step: step 2 configuration .W-V` breakover---------------------------- */ case 3: /* channel U configuration */ - timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM1); - timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE); - timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_ENABLE); + // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM0); + // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE); + SetPwmDuty(MOTOR_OUT_CH_U, 0); + // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_ENABLE); + MOTOR_U_L_DISABLE; /* channel V configuration */ - timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM1); - timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_ENABLE); - timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE); + // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0); + // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE); + SetPwmDuty(MOTOR_OUT_CH_V, 0); + // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE); + MOTOR_V_L_ENABLE; /* channel W configuration */ - timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_DISABLE); - timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE); + // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0); + // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_ENABLE); + SetPwmDuty(MOTOR_OUT_CH_W, motor_pluse); + // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE); + MOTOR_W_L_DISABLE; - step++; break; - /* next step: step 5 configuration .C-A` breakover---------------------------- */ + /* next step: step 5 configuration .V-W` breakover---------------------------- */ case 4: /* channel U configuration */ - timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM1); - timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE); - timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_ENABLE); + // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM0); + // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE); + // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_ENABLE); + SetPwmDuty(MOTOR_OUT_CH_U, 0); + MOTOR_U_L_DISABLE; /* channel V configuration */ - timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE); - timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE); + // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0); + // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_ENABLE); + SetPwmDuty(MOTOR_OUT_CH_V, motor_pluse); + // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE); + MOTOR_V_L_DISABLE; /* channel W configuration */ - timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM1); - timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_ENABLE); - timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE); + // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0); + // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE); + SetPwmDuty(MOTOR_OUT_CH_W, 0); + // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE); + MOTOR_W_L_ENABLE; - step++; break; - /* next step: step 6 configuration .C-B` breakover---------------------------- */ + /* next step: step 1 configuration .V-U` breakover---------------------------- */ case 5: /* channel U configuration */ - timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE); - timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_DISABLE); + // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE); + SetPwmDuty(MOTOR_OUT_CH_U, 0); + // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_DISABLE); + MOTOR_U_L_ENABLE; /* channel V configuration */ - timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM1); - timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE); - timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_ENABLE); + // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0); + // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_ENABLE); + SetPwmDuty(MOTOR_OUT_CH_V, motor_pluse); + // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_ENABLE); + MOTOR_V_L_DISABLE; /* channel W configuration */ - timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM1); - timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_ENABLE); - timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE); - - step++; + // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0); + // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE); + SetPwmDuty(MOTOR_OUT_CH_W, 0); + // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE); + MOTOR_W_L_DISABLE; break; - /* next step: step 1 configuration .A-B` breakover---------------------------- */ + /* next step: step 4 configuration .U-W` breakover---------------------------- */ case 6: /* channel U configuration */ - timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM1); - timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_ENABLE); - timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_DISABLE); + // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM0); + // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_ENABLE); + SetPwmDuty(MOTOR_OUT_CH_U, motor_pluse); + // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_DISABLE); + MOTOR_U_L_DISABLE; /* channel V configuration */ - timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM1); - timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE); - timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_ENABLE); + // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0); + // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE); + SetPwmDuty(MOTOR_OUT_CH_V, 0); + // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_ENABLE); + MOTOR_V_L_DISABLE; /* channel W configuration */ - timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_DISABLE); - timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE); + // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_DISABLE); + SetPwmDuty(MOTOR_OUT_CH_W, 0); + // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE); + MOTOR_W_L_ENABLE; - step = 1; break; } } @@ -344,12 +386,18 @@ */ extern void stop_pwm_output(void) { - timer_channel_output_state_config(TIMER0, TIMER_CH_0, TIMER_CCX_DISABLE); - timer_channel_complementary_output_state_config(TIMER0, TIMER_CH_0, TIMER_CCXN_DISABLE); - timer_channel_output_state_config(TIMER0, TIMER_CH_1, TIMER_CCX_DISABLE); - timer_channel_complementary_output_state_config(TIMER0, TIMER_CH_1, TIMER_CCXN_DISABLE); - timer_channel_output_state_config(TIMER0, TIMER_CH_2, TIMER_CCX_DISABLE); - timer_channel_complementary_output_state_config(TIMER0, TIMER_CH_2, TIMER_CCXN_DISABLE); + // timer_channel_output_state_config(TIMER0, TIMER_CH_0, TIMER_CCX_DISABLE); + // timer_channel_complementary_output_state_config(TIMER0, TIMER_CH_0, TIMER_CCXN_DISABLE); + // timer_channel_output_state_config(TIMER0, TIMER_CH_1, TIMER_CCX_DISABLE); + // timer_channel_complementary_output_state_config(TIMER0, TIMER_CH_1, TIMER_CCXN_DISABLE); + // timer_channel_output_state_config(TIMER0, TIMER_CH_2, TIMER_CCX_DISABLE); + // timer_channel_complementary_output_state_config(TIMER0, TIMER_CH_2, TIMER_CCXN_DISABLE); + SetPwmDuty(MOTOR_OUT_CH_U, 0); + SetPwmDuty(MOTOR_OUT_CH_V, 0); + SetPwmDuty(MOTOR_OUT_CH_W, 0); + MOTOR_W_L_DISABLE; + MOTOR_V_L_DISABLE; + MOTOR_U_L_DISABLE; } /** @@ -361,7 +409,10 @@ { /* ���ö�ʱ��ͨ����� PWM ��ռ�ձ� */ motor_pluse = pulse; - //SetPwmDuty(); + // SetPwmDuty(TIMER_CH_0, motor_pluse); + // SetPwmDuty(TIMER_CH_1, motor_pluse); + // SetPwmDuty(TIMER_CH_2, motor_pluse); + if (motor_drive.enable_flag) { motor_phasechange(); -- Gitblit v1.8.0