From 9051da0184cf839037f1370c729b27bf065b9c95 Mon Sep 17 00:00:00 2001
From: tao_z <tzj0429@163.com>
Date: Sat, 10 Jul 2021 22:06:34 +0800
Subject: [PATCH] 马达可以转动

---
 USR/SRC/Motor.c |  160 ++++++++++++++++++++++++++++------------------------
 1 files changed, 86 insertions(+), 74 deletions(-)

diff --git a/USR/SRC/Motor.c b/USR/SRC/Motor.c
index ca17a04..6e431fb 100644
--- a/USR/SRC/Motor.c
+++ b/USR/SRC/Motor.c
@@ -18,6 +18,7 @@
     motor_drive.timeout = 0;
     motor_drive.speed = 0;
     motor_drive.enable_flag = 0;
+    motor_pluse = 2000;
     memset(motor_drive.speed_group, 0, SPEED_FILTER_NUM);
 
     hall_enable();
@@ -33,8 +34,8 @@
     exti_interrupt_enable(HALL_A_EXTI);
     exti_interrupt_enable(HALL_B_EXTI);
     exti_interrupt_enable(HALL_C_EXTI);
-    StartSpeedTime(); //start speed timer
-    // motor_phasechange(); // ִ��һ�λ���
+    StartSpeedTime();    //start speed timer
+    motor_phasechange(); // ִ��һ�λ���
 
     motor_drive.enable_flag = 1;
 }
@@ -207,21 +208,17 @@
 void HAL_HallExti_TriggerCallback(void)
 {
     uint8_t step = 0;
-
-    // /* ��ȡ��������������״̬,��Ϊ��������� */
-    // if (exti_interrupt_flag_get(HALL_A_EXTI | HALL_B_EXTI | HALL_C_EXTI)) // �ж��Ƿ��ɴ����жϲ���
-    // {
-
-    //     // exti_interrupt_flag_clear(HALL_A_EXTI | HALL_B_EXTI | HALL_C_EXTI);
-    // }
-    for (step = 0; step < 30; step++)
-    {
-    }
     motor_step = get_hall_state();
-    // update_motor_speed(step, __HAL_TIM_GET_COMPARE(htim, TIM_CHANNEL_1));//TODO ����ʱ������ü���ʱ��
-    // update_motor_speed(step, 300u * GetSpeedTimerOutcnt() + timer_counter_read(TIMER2));
-    SEGGER_RTT_printf(0, "Hall state is:%d!\n", motor_step);
-    motor_drive.timeout = 0;
+    // /* ��ȡ��������������״̬,��Ϊ��������� */
+    if (exti_interrupt_flag_get(HALL_A_EXTI | HALL_B_EXTI | HALL_C_EXTI)) // �ж��Ƿ��ɴ����жϲ���
+    {
+        // update_motor_speed(step, __HAL_TIM_GET_COMPARE(htim, TIM_CHANNEL_1)); //TODO ����ʱ������ü���ʱ��
+        update_motor_speed(motor_step, 300u * GetSpeedTimerOutcnt() + timer_counter_read(TIMER2));
+        SEGGER_RTT_printf(0, "Hall state is:%d!\n", motor_step);
+        motor_drive.timeout = 0;
+        //     // exti_interrupt_flag_clear(HALL_A_EXTI | HALL_B_EXTI | HALL_C_EXTI);
+    }
+
     // if (RESET != exti_interrupt_flag_get(EXTI_4))
     // {
     //     SEGGER_RTT_printf(0, "HALL_A_EXTI  triggle!\n");
@@ -234,7 +231,7 @@
     // {
     //     SEGGER_RTT_printf(0, "HALL_B_EXTI  triggle!\n");
     // }
-    // motor_phasechange();
+    motor_phasechange();
     // HAL_TIM_GenerateEvent(&htimx_bldcm, TIM_EVENTSOURCE_COM); // ������������¼�����ʱ�Ž�����д��
 }
 
@@ -248,135 +245,150 @@
     }
     switch (step)
     {
-    /* next step: step 2 configuration .A-C` breakover---------------------------- */
+    /* next step: step 3 configuration .W-U` breakover---------------------------- */
     case 1:
         /*  channel U configuration */
-        timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM0);
-        timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_ENABLE);
-        MOTOR_U_L_DISABLE;
+
+        // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE);
+        SetPwmDuty(MOTOR_OUT_CH_U, 0);
+        MOTOR_U_L_ENABLE;
         // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_DISABLE);
 
         /*  channel V configuration */
-        timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE);
+        // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE);
+        SetPwmDuty(MOTOR_OUT_CH_V, 0);
         MOTOR_V_L_DISABLE;
         // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE);
 
         /*  channel W configuration */
         // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0);
-        timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_DISABLE);
-        MOTOR_W_L_ENABLE;
+        // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_ENABLE);
+        SetPwmDuty(MOTOR_OUT_CH_W, motor_pluse);
+        MOTOR_W_L_DISABLE;
         // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_ENABLE);
 
-        step++;
         break;
 
-    /* next step: step 3 configuration .B-C` breakover---------------------------- */
+    /* next step: step 6 configuration .u-v` breakover---------------------------- */
     case 2:
         /*  channel U configuration */
-        timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE);
-        timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_DISABLE);
+        // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM0);
+        // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_ENABLE);
+        SetPwmDuty(MOTOR_OUT_CH_U, motor_pluse);
+        // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_DISABLE);
         MOTOR_U_L_DISABLE;
 
         /*  channel V configuration */
-        timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0);
-        timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_ENABLE);
+        // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0);
+        // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE);
+        SetPwmDuty(MOTOR_OUT_CH_V, 0);
         // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE);
-        MOTOR_V_L_DISABLE;
+        MOTOR_V_L_ENABLE;
 
         /*  channel W configuration */
-        timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0);
-        timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_DISABLE);
+        // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0);
+        // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_DISABLE);
+        SetPwmDuty(MOTOR_OUT_CH_W, 0);
         // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_ENABLE);
-        MOTOR_W_L_ENABLE;
+        MOTOR_W_L_DISABLE;
 
-        step++;
         break;
 
-    /* next step: step 4 configuration .B-A` breakover---------------------------- */
+    /* next step: step 2 configuration .W-V` breakover---------------------------- */
     case 3:
         /*  channel U configuration */
-        timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM0);
-        timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE);
+        // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM0);
+        // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE);
+        SetPwmDuty(MOTOR_OUT_CH_U, 0);
         // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_ENABLE);
-        MOTOR_U_L_ENABLE;
+        MOTOR_U_L_DISABLE;
 
         /*  channel V configuration */
-        timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0);
-        timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_ENABLE);
+        // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0);
+        // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE);
+        SetPwmDuty(MOTOR_OUT_CH_V, 0);
         // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE);
-        MOTOR_V_L_DISABLE;
+        MOTOR_V_L_ENABLE;
 
         /*  channel W configuration */
-        timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_DISABLE);
+        // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0);
+        // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_ENABLE);
+        SetPwmDuty(MOTOR_OUT_CH_W, motor_pluse);
         // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE);
         MOTOR_W_L_DISABLE;
 
-        step++;
         break;
 
-    /* next step: step 5 configuration .C-A` breakover---------------------------- */
+    /* next step: step 5 configuration .V-W` breakover---------------------------- */
     case 4:
         /*  channel U configuration */
-        timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM0);
-        timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE);
+        // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM0);
+        // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE);
         // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_ENABLE);
-        MOTOR_U_L_ENABLE;
+        SetPwmDuty(MOTOR_OUT_CH_U, 0);
+        MOTOR_U_L_DISABLE;
 
         /*  channel V configuration */
-        timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE);
+        // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0);
+        // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_ENABLE);
+        SetPwmDuty(MOTOR_OUT_CH_V, motor_pluse);
         // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE);
         MOTOR_V_L_DISABLE;
 
         /*  channel W configuration */
-        timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0);
-        timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_ENABLE);
+        // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0);
+        // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE);
+        SetPwmDuty(MOTOR_OUT_CH_W, 0);
         // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE);
-        MOTOR_W_L_DISABLE;
+        MOTOR_W_L_ENABLE;
 
-        step++;
         break;
 
-    /* next step: step 6 configuration .C-B` breakover---------------------------- */
+    /* next step: step 1 configuration .V-U` breakover---------------------------- */
     case 5:
         /*  channel U configuration */
-        timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE);
+        // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE);
+        SetPwmDuty(MOTOR_OUT_CH_U, 0);
         // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_DISABLE);
-        MOTOR_U_L_DISABLE;
+        MOTOR_U_L_ENABLE;
 
         /*  channel V configuration */
-        timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0);
-        timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE);
+        // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0);
+        // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_ENABLE);
+        SetPwmDuty(MOTOR_OUT_CH_V, motor_pluse);
         // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_ENABLE);
-        MOTOR_V_L_ENABLE;
+        MOTOR_V_L_DISABLE;
 
         /*  channel W configuration */
-        timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0);
-        timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_ENABLE);
+        // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0);
+        // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE);
+        SetPwmDuty(MOTOR_OUT_CH_W, 0);
         // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE);
         MOTOR_W_L_DISABLE;
-        step++;
         break;
 
-    /* next step: step 1 configuration .A-B` breakover---------------------------- */
+    /* next step: step 4 configuration .U-W` breakover---------------------------- */
     case 6:
         /*  channel U configuration */
-        timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM0);
-        timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_ENABLE);
+        // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM0);
+        // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_ENABLE);
+        SetPwmDuty(MOTOR_OUT_CH_U, motor_pluse);
         // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_DISABLE);
         MOTOR_U_L_DISABLE;
 
         /*  channel V configuration */
-        timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0);
-        timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE);
+        // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM0);
+        // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE);
+        SetPwmDuty(MOTOR_OUT_CH_V, 0);
         // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_ENABLE);
-        MOTOR_V_L_ENABLE;
+        MOTOR_V_L_DISABLE;
 
         /*  channel W configuration */
-        timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_DISABLE);
+        // timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_DISABLE);
+        SetPwmDuty(MOTOR_OUT_CH_W, 0);
         // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE);
-        MOTOR_W_L_DISABLE;
+        MOTOR_W_L_ENABLE;
 
-        step = 1;
         break;
     }
 }
@@ -408,9 +420,9 @@
 {
     /* ���ö�ʱ��ͨ����� PWM ��ռ�ձ� */
     motor_pluse = pulse;
-    SetPwmDuty(TIMER_CH_0, motor_pluse);
-    SetPwmDuty(TIMER_CH_1, motor_pluse);
-    SetPwmDuty(TIMER_CH_2, motor_pluse);
+    // SetPwmDuty(TIMER_CH_0, motor_pluse);
+    // SetPwmDuty(TIMER_CH_1, motor_pluse);
+    // SetPwmDuty(TIMER_CH_2, motor_pluse);
 
     if (motor_drive.enable_flag)
     {

--
Gitblit v1.8.0