From 945ba42f7550d5a203e43d82b43ed82dc981d9e9 Mon Sep 17 00:00:00 2001
From: tao_z <tzj0429@163.com>
Date: Wed, 30 Jun 2021 22:05:52 +0800
Subject: [PATCH] 霍尔输入中断正常，需要调试马达转动
---
USR/SRC/Motor.c | 91 ++++++++++++++++++++++++++++++++++-----------
1 files changed, 69 insertions(+), 22 deletions(-)
diff --git a/USR/SRC/Motor.c b/USR/SRC/Motor.c
index 416681b..514feb8 100644
--- a/USR/SRC/Motor.c
+++ b/USR/SRC/Motor.c
@@ -4,10 +4,23 @@
#include "gd32e23x_timer.h"
#include "bldc_ctrl.h"
#include "pwm.h"
+#include "string.h"
+#include "SEGGER_RTT_Conf.h"
+#include "SEGGER_RTT.h"
static volatile motor_rotate_t motor_drive = {0};
static uint32_t motor_pluse = 0;
static void motor_phasechange(void);
static void update_speed_dir(uint8_t dir_in);
+
+extern void Motor_Init(void)
+{
+ motor_drive.timeout = 0;
+ motor_drive.speed = 0;
+ motor_drive.enable_flag = 0;
+ memset(motor_drive.speed_group, 0, SPEED_FILTER_NUM);
+
+ hall_enable();
+};
/**
* @brief ʹ�ܻ���������
* @param ��
@@ -73,15 +86,16 @@
float f = 0;
/* �����ٶȣ�
- ���ÿתһȦ����12�����壬(1.0/(64000000.0/6400)Ϊ�����������ڣ�(1.0/(48000000.0/6400) * time)Ϊʱ�䳤��
+ ���ÿתһȦ����12�����壬(1.0/(48000000.0/6400)Ϊ�����������ڣ�(1.0/(48000000.0/6400) * time)Ϊʱ�䳤��
*/
if (time == 0)
motor_drive.speed_group[count++] = 0;
else
{
- f = (1.0f / (64000000.0f / SPEED_PRESCALER_COUNT) * time);
- f = (1.0f / 12.0f) / (f / 60.0f);
+ // f = (1.0f / (48000000.0f / SPEED_PRESCALER_COUNT) * time);
+ // f = (1.0f / 12.0f) / (f / 60.0f);
+ f = time;
motor_drive.speed_group[count++] = f;
}
update_speed_dir(dir_in);
@@ -191,13 +205,29 @@
*/
void HAL_HallExti_TriggerCallback(void)
{
+ uint8_t step = 0;
+ step = get_hall_state();
/* ��ȡ��������������״̬,��Ϊ��������� */
if (exti_interrupt_flag_get(HALL_A_EXTI | HALL_B_EXTI | HALL_C_EXTI)) // �ж��Ƿ��ɴ����жϲ���
{
// update_motor_speed(step, __HAL_TIM_GET_COMPARE(htim, TIM_CHANNEL_1));//TODO ����ʱ������ü���ʱ��
+ update_motor_speed(step, 300u * GetSpeedTimerOutcnt() + timer_counter_read(TIMER2));
+ SEGGER_RTT_printf(0, "Speed is:%d!\n", motor_drive.speed);
motor_drive.timeout = 0;
exti_interrupt_flag_clear(HALL_A_EXTI | HALL_B_EXTI | HALL_C_EXTI);
}
+ // if (RESET != exti_interrupt_flag_get(EXTI_4))
+ // {
+ // SEGGER_RTT_printf(0, "HALL_A_EXTI triggle!\n");
+ // }
+ // else if (RESET != exti_interrupt_flag_get(EXTI_5))
+ // {
+ // SEGGER_RTT_printf(0, "HALL_C_EXTI triggle!\n");
+ // }
+ // else if (RESET != exti_interrupt_flag_get(EXTI_15))
+ // {
+ // SEGGER_RTT_printf(0, "HALL_B_EXTI triggle!\n");
+ // }
motor_phasechange();
// HAL_TIM_GenerateEvent(&htimx_bldcm, TIM_EVENTSOURCE_COM); // ������������¼�����ʱ�Ž�����д��
}
@@ -217,16 +247,19 @@
/* channel U configuration */
timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM1);
timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_ENABLE);
- timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_DISABLE);
+ MOTOR_U_L_DISABLE;
+ // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_DISABLE);
/* channel V configuration */
timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE);
- timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE);
+ MOTOR_V_L_DISABLE;
+ // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE);
/* channel W configuration */
- timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM1);
+ // timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM1);
timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_DISABLE);
- timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_ENABLE);
+ MOTOR_W_L_ENABLE;
+ // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_ENABLE);
step++;
break;
@@ -236,16 +269,19 @@
/* channel U configuration */
timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE);
timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_DISABLE);
+ MOTOR_U_L_DISABLE;
/* channel V configuration */
timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM1);
timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_ENABLE);
- timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE);
+ // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE);
+ MOTOR_V_L_DISABLE;
/* channel W configuration */
timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM1);
timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_DISABLE);
- timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_ENABLE);
+ // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_ENABLE);
+ MOTOR_W_L_ENABLE;
step++;
break;
@@ -255,16 +291,19 @@
/* channel U configuration */
timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM1);
timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE);
- timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_ENABLE);
+ // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_ENABLE);
+ MOTOR_U_L_ENABLE;
/* channel V configuration */
timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM1);
timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_ENABLE);
- timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE);
+ // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE);
+ MOTOR_V_L_DISABLE;
/* channel W configuration */
timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_DISABLE);
- timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE);
+ // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE);
+ MOTOR_W_L_DISABLE;
step++;
break;
@@ -274,16 +313,19 @@
/* channel U configuration */
timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM1);
timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE);
- timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_ENABLE);
+ // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_ENABLE);
+ MOTOR_U_L_ENABLE;
/* channel V configuration */
timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE);
- timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE);
+ // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_DISABLE);
+ MOTOR_V_L_DISABLE;
/* channel W configuration */
timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM1);
timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_ENABLE);
- timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE);
+ // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE);
+ MOTOR_W_L_DISABLE;
step++;
break;
@@ -292,18 +334,20 @@
case 5:
/* channel U configuration */
timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_DISABLE);
- timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_DISABLE);
+ // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_DISABLE);
+ MOTOR_U_L_DISABLE;
/* channel V configuration */
timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM1);
timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE);
- timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_ENABLE);
+ // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_ENABLE);
+ MOTOR_V_L_ENABLE;
/* channel W configuration */
timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM1);
timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_ENABLE);
- timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE);
-
+ // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE);
+ MOTOR_W_L_DISABLE;
step++;
break;
@@ -312,16 +356,19 @@
/* channel U configuration */
timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_U, TIMER_OC_MODE_PWM1);
timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCX_ENABLE);
- timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_DISABLE);
+ // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_U, TIMER_CCXN_DISABLE);
+ MOTOR_U_L_DISABLE;
/* channel V configuration */
timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_V, TIMER_OC_MODE_PWM1);
timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCX_DISABLE);
- timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_ENABLE);
+ // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_V, TIMER_CCXN_ENABLE);
+ MOTOR_V_L_ENABLE;
/* channel W configuration */
timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_DISABLE);
- timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE);
+ // timer_channel_complementary_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCXN_DISABLE);
+ MOTOR_W_L_DISABLE;
step = 1;
break;
--
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