From 82e38738a4d532cc3d56cbf80c1a4093f23cdd6a Mon Sep 17 00:00:00 2001
From: tao_z <tzj0429@163.com>
Date: Wed, 14 Jul 2021 07:01:42 +0800
Subject: [PATCH] 调整时钟64MHz。 RTT任务增加马达开启和关闭功能
---
USR/SRC/Clock.c | 10 ++--
USR/SRC/Motor.c | 37 ++++++------------
USR/INC/clock.h | 2
USR/SRC/RttTask.c | 17 +++++---
USR/INC/motor.h | 2
USR/SRC/bldc_ctrl.c | 4 +-
USR/INC/pwm.h | 8 ++-
USR/SRC/pwm.c | 11 ++++-
8 files changed, 46 insertions(+), 45 deletions(-)
diff --git a/USR/INC/clock.h b/USR/INC/clock.h
index 9be6eb7..b279082 100644
--- a/USR/INC/clock.h
+++ b/USR/INC/clock.h
@@ -1,7 +1,7 @@
#ifndef _CLOCK_H_
#define _CLOCK_H_
#include "stdint.h"
-#define SYSTEM_CLOCK (48000000UL)
+#define SYSTEM_CLOCK (64000000UL)
void Clock_Config(void);
void Ostick_config(void);
void delay_1ms(uint32_t count);
diff --git a/USR/INC/motor.h b/USR/INC/motor.h
index fb8190d..f519be8 100644
--- a/USR/INC/motor.h
+++ b/USR/INC/motor.h
@@ -17,7 +17,7 @@
/* �ۼ� TIM_Period�������һ�����»����ж�
����ʱ����0������65535����Ϊ65535�Σ�Ϊһ���������� */
#define HALL_PERIOD_COUNT (0xFFFF)
-#define SPEED_PRESCALER_COUNT (4800u)
+#define SPEED_PRESCALER_COUNT (6400u)
#define SPEED_PERIOD_COUNT (30000u)
/* ͨ�ÿ��ƶ�ʱ��ʱ��ԴTIMxCLK = HCLK = 64MHz
�趨��ʱ��Ƶ��Ϊ = TIMxCLK / (SPEED_PRESCALER_COUNT) / SPEED_PERIOD_COUNT = 33.333Hz
diff --git a/USR/INC/pwm.h b/USR/INC/pwm.h
index da32571..5be01f7 100644
--- a/USR/INC/pwm.h
+++ b/USR/INC/pwm.h
@@ -1,11 +1,13 @@
#ifndef _PWM_H_
#define _PWM_H_
#include "gd32e23x_timer.h"
-//100us * 30000 = 3s
+//1us * 30000 = 30ms
#define PERIOD_CAP (30000U)
+#define SPEED_TIMEOUT (300U) //9S
-//48Mzhz / 3000 = 16Khz = 62.5us
-#define PERIOD_CMP (3000u)
+//64Mzhz / 3200 = 20Khz = 50us
+#define PERIOD_CMP (3200u)
+#define TIMER2_PERIOD (63U)
void TimerInit(void);
void SetPwmDuty(uint16_t ch, uint32_t duty);
diff --git a/USR/SRC/Clock.c b/USR/SRC/Clock.c
index 3b3e58e..6b0df24 100644
--- a/USR/SRC/Clock.c
+++ b/USR/SRC/Clock.c
@@ -12,11 +12,11 @@
rcu_osci_on(RCU_IRC8M); //ʹ���ڲ�8MRCʱ��
rcu_osci_stab_wait(RCU_IRC8M);
rcu_system_clock_source_config(RCU_CKSYSSRC_PLL); //sysclk is PLL
- rcu_pll_config(RCU_PLLSRC_IRC8M_DIV2, RCU_PLL_MUL12); //8MHz/2 =4MHz PLL =4MHz*12 =48MHz
- rcu_ahb_clock_config(RCU_AHB_CKSYS_DIV1); //AHB 48M
- rcu_apb1_clock_config(RCU_APB1_CKAHB_DIV1); //APB1 48M
- rcu_apb2_clock_config(RCU_APB2_CKAHB_DIV1); //APB2 48M
- rcu_adc_clock_config(RCU_ADCCK_APB2_DIV4); //max 14M,current:48/4=12M
+ rcu_pll_config(RCU_PLLSRC_IRC8M_DIV2, RCU_PLL_MUL16); //8MHz/2 =4MHz PLL =4MHz*16 =64MHz
+ rcu_ahb_clock_config(RCU_AHB_CKSYS_DIV1); //AHB 64M
+ rcu_apb1_clock_config(RCU_APB1_CKAHB_DIV1); //APB1 64M
+ rcu_apb2_clock_config(RCU_APB2_CKAHB_DIV1); //APB2 64M
+ rcu_adc_clock_config(RCU_ADCCK_APB2_DIV8); //max 14M,current:64/8=8M
rcu_usart_clock_config(RCU_USART0SRC_IRC8M); //USART0 8M
rcu_rtc_clock_config(RCU_RTCSRC_NONE);
diff --git a/USR/SRC/Motor.c b/USR/SRC/Motor.c
index 6e431fb..13f4768 100644
--- a/USR/SRC/Motor.c
+++ b/USR/SRC/Motor.c
@@ -18,10 +18,10 @@
motor_drive.timeout = 0;
motor_drive.speed = 0;
motor_drive.enable_flag = 0;
- motor_pluse = 2000;
+ motor_pluse = 0;
memset(motor_drive.speed_group, 0, SPEED_FILTER_NUM);
- hall_enable();
+ // hall_enable();
};
/**
* @brief ʹ�ܻ���������
@@ -88,14 +88,14 @@
float f = 0;
/* �����ٶȣ�
- ���ÿתһȦ����12�����壬(1.0/(48000000.0/6400)Ϊ�����������ڣ�(1.0/(48000000.0/6400) * time)Ϊʱ�䳤��
+ ���ÿתһȦ����12�����壬(1.0/(64000000.0/6400)Ϊ�����������ڣ�(1.0/(64000000.0/6400) * time)Ϊʱ�䳤��
*/
if (time == 0)
motor_drive.speed_group[count++] = 0;
else
{
- // f = (1.0f / (48000000.0f / SPEED_PRESCALER_COUNT) * time);
+ // f = (1.0f / (64000000.0f / SPEED_PRESCALER_COUNT) * time);
// f = (1.0f / 12.0f) / (f / 60.0f);
f = time;
motor_drive.speed_group[count++] = f;
@@ -212,25 +212,11 @@
// /* ��ȡ��������������״̬,��Ϊ��������� */
if (exti_interrupt_flag_get(HALL_A_EXTI | HALL_B_EXTI | HALL_C_EXTI)) // �ж��Ƿ��ɴ����жϲ���
{
- // update_motor_speed(step, __HAL_TIM_GET_COMPARE(htim, TIM_CHANNEL_1)); //TODO ����ʱ������ü���ʱ��
- update_motor_speed(motor_step, 300u * GetSpeedTimerOutcnt() + timer_counter_read(TIMER2));
- SEGGER_RTT_printf(0, "Hall state is:%d!\n", motor_step);
+ // update_motor_speed(motor_step, 300u * GetSpeedTimerOutcnt() + timer_counter_read(TIMER2));
+ SEGGER_RTT_printf(0, "motor speed is:%d,%d!\n", GetSpeedTimerOutcnt(), timer_counter_read(TIMER2));
+ timer_counter_value_config(TIMER2, 0);
motor_drive.timeout = 0;
- // // exti_interrupt_flag_clear(HALL_A_EXTI | HALL_B_EXTI | HALL_C_EXTI);
}
-
- // if (RESET != exti_interrupt_flag_get(EXTI_4))
- // {
- // SEGGER_RTT_printf(0, "HALL_A_EXTI triggle!\n");
- // }
- // else if (RESET != exti_interrupt_flag_get(EXTI_5))
- // {
- // SEGGER_RTT_printf(0, "HALL_C_EXTI triggle!\n");
- // }
- // else if (RESET != exti_interrupt_flag_get(EXTI_15))
- // {
- // SEGGER_RTT_printf(0, "HALL_B_EXTI triggle!\n");
- // }
motor_phasechange();
// HAL_TIM_GenerateEvent(&htimx_bldcm, TIM_EVENTSOURCE_COM); // ������������¼�����ʱ�Ž�����д��
}
@@ -400,12 +386,15 @@
*/
extern void stop_pwm_output(void)
{
- timer_channel_output_state_config(TIMER0, TIMER_CH_0, TIMER_CCX_DISABLE);
+ // timer_channel_output_state_config(TIMER0, TIMER_CH_0, TIMER_CCX_DISABLE);
// timer_channel_complementary_output_state_config(TIMER0, TIMER_CH_0, TIMER_CCXN_DISABLE);
- timer_channel_output_state_config(TIMER0, TIMER_CH_1, TIMER_CCX_DISABLE);
+ // timer_channel_output_state_config(TIMER0, TIMER_CH_1, TIMER_CCX_DISABLE);
// timer_channel_complementary_output_state_config(TIMER0, TIMER_CH_1, TIMER_CCXN_DISABLE);
- timer_channel_output_state_config(TIMER0, TIMER_CH_2, TIMER_CCX_DISABLE);
+ // timer_channel_output_state_config(TIMER0, TIMER_CH_2, TIMER_CCX_DISABLE);
// timer_channel_complementary_output_state_config(TIMER0, TIMER_CH_2, TIMER_CCXN_DISABLE);
+ SetPwmDuty(MOTOR_OUT_CH_U, 0);
+ SetPwmDuty(MOTOR_OUT_CH_V, 0);
+ SetPwmDuty(MOTOR_OUT_CH_W, 0);
MOTOR_W_L_DISABLE;
MOTOR_V_L_DISABLE;
MOTOR_U_L_DISABLE;
diff --git a/USR/SRC/RttTask.c b/USR/SRC/RttTask.c
index a0cd66c..dd4ca5b 100644
--- a/USR/SRC/RttTask.c
+++ b/USR/SRC/RttTask.c
@@ -4,6 +4,7 @@
#include "gd32e23x.h"
#include "pwm.h"
#include "motor.h"
+#include "bldc_ctrl.h"
static uint32_t RttDataOutPutFlag = 0;
static void RTT_KeyValue(uint32_t key);
extern void RTT_TaskInit(void)
@@ -29,7 +30,9 @@
}
if (0 != RttDataOutPutFlag)
{
- SEGGER_RTT_printf(0, "%d\n", output_index++);
+ // SEGGER_RTT_printf(0, "%d\n", output_index++);
+ output_index = (uint32_t)get_motor_speed();
+ SEGGER_RTT_printf(0, "motor speed is:%d!\n", output_index);
}
}
@@ -43,7 +46,7 @@
case 'd':
case 'D':
RttDataOutPutFlag = !RttDataOutPutFlag;
- SEGGER_RTT_printf(0, "Index:\tTemp\tBase\tCP\tleakCurr\tCurr\tAC_Vot\tState\tError\n");
+ SEGGER_RTT_printf(0, "RTT Output data stop or start!\n");
break;
case 'v':
case 'V':
@@ -60,13 +63,15 @@
SEGGER_RTT_printf(0, "Software Compile time is :%s %s\n\r", &COMPILE_DATE, &COMPILE_TIME);
break;
case 'o':
- timer_channel_output_mode_config(TIMER0, MOTOR_OUT_CH_W, TIMER_OC_MODE_PWM0);
- timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_ENABLE);
+ case 'O':
+ set_bldcm_speed(2000);
+ set_bldcm_enable();
break;
case 's':
- timer_channel_output_state_config(TIMER0, MOTOR_OUT_CH_W, TIMER_CCX_DISABLE);
+ case 'S':
+ set_bldcm_disable();
break;
default:
- break;`
+ break;
}
}
\ No newline at end of file
diff --git a/USR/SRC/bldc_ctrl.c b/USR/SRC/bldc_ctrl.c
index cb1fd5d..2428a6f 100644
--- a/USR/SRC/bldc_ctrl.c
+++ b/USR/SRC/bldc_ctrl.c
@@ -26,8 +26,8 @@
Set_SDH2136_Enable();
// Set_SDH2136_Disable();
bldcm_data.direction = MOTOR_FWD;
- bldcm_data.is_enable = 1;
- bldcm_data.dutyfactor = 1500;
+ bldcm_data.is_enable = 0;
+ bldcm_data.dutyfactor = 2000;
}
/**
diff --git a/USR/SRC/pwm.c b/USR/SRC/pwm.c
index d51e789..e94f7f5 100644
--- a/USR/SRC/pwm.c
+++ b/USR/SRC/pwm.c
@@ -9,6 +9,7 @@
*
*/
#include "pwm.h"
+#include "bldc_ctrl.h"
static volatile uint32_t timer_outcnt = 0;
/*****************************************************************************************************
Timer2 is used to speed cal
@@ -24,10 +25,10 @@
timer_deinit(TIMER2);
- timercontralcfg.prescaler = 4799; //48Mhz /4800 =0.01Mhz = 100us
+ timercontralcfg.prescaler = TIMER2_PERIOD; //64Mhz /64 =1Mhz = 1us
timercontralcfg.alignedmode = TIMER_COUNTER_EDGE;
timercontralcfg.counterdirection = TIMER_COUNTER_UP;
- timercontralcfg.period = PERIOD_CAP; //100us*10000=1s
+ timercontralcfg.period = PERIOD_CAP; //1us*30000=30ms
timer_init(TIMER2, &timercontralcfg);
timer_interrupt_flag_clear(TIMER2, TIMER_INT_UP);
@@ -145,7 +146,11 @@
}
extern void TIMER2_IRQHandler_CallBack(void)
{
- timer_outcnt++;
+ if (++timer_outcnt > SPEED_TIMEOUT)
+ {
+ //to do
+ set_bldcm_disable();
+ }
}
extern uint32_t GetSpeedTimerOutcnt(void)
--
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