/** ****************************************************************************** * @file xl_spi.c * @author xu.wang * @version 4.5.2 * @date Fri Mar 26 17:29:12 2021 * @brief This file provide function about spi firmware program ****************************************************************************** * @attention * * 2019 by Chipways Communications,Inc. All Rights Reserved. * This software is supplied under the terms of a license * agreement or non-disclosure agreement with Chipways. * Passing on and copying of this document,and communication * of its contents is not permitted without prior written * authorization. * *

© COPYRIGHT 2019 Chipways

****************************************************************************** */ #if defined(__cplusplus) extern "C" { #endif /* __cplusplus */ /* Includes ---------------------------------------------------------------*/ #include "xl_spi.h" /** @addtogroup XL6600_StdPeriph_Driver * @{ */ /** @defgroup SPI SPI Module * @brief SPI Driver Modules Library * @{ */ /* Private typedef -----------------------------------------------------------*/ /* Private define ------------------------------------------------------------*/ /* Private macro -------------------------------------------------------------*/ /* Private variables ---------------------------------------------------------*/ /* Private function prototypes -----------------------------------------------*/ /* Private functions ---------------------------------------------------------*/ /** @defgroup SPI_Private_Functions * @{ */ /** * @brief SPIÍâÉè»Ö¸´³õʼ״̬ * @param SPIx: SPIÍâÉèµÄÑ¡Ôñ * Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ: * @arg SPI0 £ºSPI0ÍâÉè * @arg SPI1 £ºSPI1ÍâÉè * @retval None */ void SPI_DeInit(SPI_Type *SPIx) { /* Deinitializes to default reset values */ SPIx->CTRLR0 = 0x0007u; SPIx->CTRLR1 = 0x0000u; SPIx->BAUDR = 0x0000u; SPIx->TXFTLR = 0x0000u; SPIx->RXFTLR = 0x0000u; } /** * @brief ÉèÖÃSPIµÄģʽ * @param SPIx: SPIÍâÉèµÄÑ¡Ôñ * Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ: * @arg SPI0 £ºSPI0ÍâÉè * @arg SPI1 £ºSPI1ÍâÉè * @param SPI_MODEType: Ñ¡ÔñSPI¹¤×÷ģʽ * Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ: * @arg SPI_MODE_MASTER(0x00) £ºÖ÷»úģʽ * @arg SPI_MODE_SLAVE (0x01) £º´Ó»úģʽ * @retval None */ void SPI_SetMode(SPI_Type *SPIx,SPI_MODETypeDef SPI_MODEType) { if(SPI_MODEType != SPI_MODE_MASTER ) { /* SLAVE SPI */ SPIx->MODE |= SPI_MODE_MSTR_MASK; } else { /* MASTER SPI */ SPIx->MODE &= ~SPI_MODE_MSTR_MASK; } } /** * @brief ÉèÖÃSPI·¢ËÍÊý¾Ý°üµÄģʽ * @param SPIx: SPIÍâÉèµÄÑ¡Ôñ * Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ: * @arg SPI0 £ºSPI0ÍâÉè * @arg SPI1 £ºSPI1ÍâÉè * @param SPI_PACKType: Êý¾Ý°üµÄģʽ£¬Ñ¡ÔñÊdz¤°ü·¢ËÍ»¹ÊǶ̰ü·¢ËÍ * Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ: * @arg SPI_PACK_CS_LOW(0x00) :ƬѡΪµÍ * @arg SPI_PACK_CS_HIGHT (0x01):ƬѡΪ¸ß * @retval None */ void SPI_SetPackCS(SPI_Type *SPIx,SPI_PACKCSTypeDef SPI_PACKCSType) { if(SPI_PACKCSType != SPI_PACK_CS_HIGHT ) { /* SLAVE SPI */ SPIx->MODE |= SPI_MODE_PACK_MASK; } else { /* MASTER SPI */ SPIx->MODE &= ~SPI_MODE_PACK_MASK; } } /** * @brief SPIΪÖ÷»úʱ³õʼ»¯ * @param SPIx: SPIÍâÉèµÄÑ¡Ôñ * Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ: * @arg SPI0 £ºSPI0ÍâÉè * @arg SPI1 £ºSPI1ÍâÉè * @param SPI_MasterInitStruct: ÐèÒª³õʼ»¯µÄ²ÎÊý½á¹¹Ìå * @retval None */ void SPI_MasterInit(SPI_Type* SPIx, const SPI_MsterInitTypeDef *SPI_MasterInitStruct) { uint16_t slckdiv; /* Set the CTRLR0 */ /* Set the bit in CTRLR0 Register */ SPIx->CTRLR0 = (SPI_MasterInitStruct->SPI_SRL | SPI_MasterInitStruct->SPI_TMOD | \ SPI_MasterInitStruct->SPI_SCPOL | SPI_MasterInitStruct->SPI_SCPH | \ SPI_MasterInitStruct->SPI_DFS); /* Set the CTRLR1 Register bit*/ SPIx->CTRLR1 = SPI_MasterInitStruct->SPI_NDF; /* Set the BAUDR */ slckdiv= (uint16_t)(SPI_MasterInitStruct->SPI_SourceClk/SPI_MasterInitStruct->SPI_BAUDR); SPIx->BAUDR = slckdiv; /* Set the TXFTLR */ SPIx->TXFTLR = SPI_MasterInitStruct->SPI_TFT; /* Set the RXFTLR */ SPIx->RXFTLR = SPI_MasterInitStruct->SPI_RFT; } /** * @brief SPIΪ´Ó»úʱµÄ³õʼ»¯ * @param SPIx: SPIÍâÉèµÄÑ¡Ôñ * Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ: * @arg SPI0 £ºSPI0ÍâÉè * @arg SPI1 £ºSPI1ÍâÉè * @param SPI_SlaveInitTypeDef: ÐèÒª³õʼ»¯µÄ²ÎÊý½á¹¹Ìå * @retval None */ void SPI_SlaveInit(SPI_Type* SPIx, const SPI_SlaveInitTypeDef *SPI_SlaveInitStruct) { /* Set the CTRLR0 */ /* Set the bit in CTRLR0 Register */ SPIx->CTRLR0 = (SPI_SlaveInitStruct->SPI_SRL | SPI_SlaveInitStruct->SPI_TMOD | \ SPI_SlaveInitStruct->SPI_SCPOL | SPI_SlaveInitStruct->SPI_SCPH | \ SPI_SlaveInitStruct->SPI_DFS); /* check the slave output Enable */ if(SPI_SlaveInitStruct->SPI_SLVOE != DISABLE) { SPIx->CTRLR0 &= ~SPI_CTRLR0_SLVOE_MASK; } else { SPIx->CTRLR0 |= SPI_CTRLR0_SLVOE_MASK; } /* Set the TXFTLR */ SPIx->TXFTLR = SPI_SlaveInitStruct->SPI_TFT; /* Set the RXFTLR */ SPIx->RXFTLR = SPI_SlaveInitStruct->SPI_RFT; } /** * @brief SPIʹÄÜ * @param SPIx: SPIÍâÉèµÄÑ¡Ôñ * Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ: * @arg SPI0 £ºSPI0ÍâÉè * @arg SPI1 £ºSPI1ÍâÉè * @param NewState: ʹÄܺÍʧÄÜÑ¡Ôñ * Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ: * @arg ENABLE £ºÊ¹ÄÜ * @arg DISENABLE £ºÊ§ÄÜ * @retval None */ void SPI_EnableCmd(SPI_Type *SPIx,FunctionalState NewState) { if(NewState != DISABLE ) { /* Enable the SPI */ SPIx->SPIENR |= SPI_SPIENR_SPIE_MASK; } else { /* Disable the SPI */ SPIx->SPIENR &= ~SPI_SPIENR_SPIE_MASK; } } /** * @brief SPI×÷Ϊ´Ó»úʱʹÄÜÃüÁî * @param SPIx: SPIÍâÉèµÄÑ¡Ôñ * Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ: * @arg SPI0 £ºSPI0ÍâÉè * @arg SPI1 £ºSPI1ÍâÉè * @param NewState: ʹÄܺÍʧÄÜÑ¡Ôñ * Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ: * @arg ENABLE £ºÊ¹ÄÜ * @arg DISENABLE £ºÊ§ÄÜ * @retval None */ void SPI_SlaveEnableCmd(SPI_Type *SPIx,FunctionalState NewState) { if(NewState != DISABLE ) { /* Enable the SPI Slave Select Output */ SPIx->SER |= SPI_SER_SSEF_MASK; } else { /* Disable the SPI Slave Select Output */ SPIx->SER &= ~SPI_SER_SSEF_MASK; } } /** * @brief SPI·¢ËÍÊý¾Ý * @param SPIx: SPIÍâÉèµÄÑ¡Ôñ * Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ: * @arg SPI0 £ºSPI0ÍâÉè * @arg SPI1 £ºSPI1ÍâÉè * @param Data: ·¢Ë͵ÄÊý¾Ý * @retval None */ void SPI_SendData(SPI_Type *SPIx,uint16_t Data) { /* Write in the DR register the data to be sent */ SPIx->DR[0] = Data; } /** * @brief SPI½ÓÊÕÊý¾Ý * @param SPIx: SPIÍâÉèµÄÑ¡Ôñ * Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ: * @arg SPI0 £ºSPI0ÍâÉè * @arg SPI1 £ºSPI1ÍâÉè * @retval Data£ºSPI½ÓÊÕµÄÊý¾Ý */ uint16_t SPI_ReceiveData(const SPI_Type *SPIx) { uint16_t Data; Data =(uint16_t)SPIx->DR[0]; /* Return the data in the DR register */ return Data; } /** * @brief µÃµ½SPIÖÐFIFOÓÐЧÊý¾ÝµÄ¸öÊý * @param SPIx: SPIÍâÉèµÄÑ¡Ôñ * Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ: * @arg SPI0 £ºSPI0ÍâÉè * @arg SPI1 £ºSPI1ÍâÉè * @param FIFOLevelDef: FIFOÀàÐÍ£¬·¢ËÍFIFO»ò½ÓÊÕFIFO * Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ: * @arg SPI_TransmitFIFOLevel (0x00), ·¢ËÍFIFO * @arg SPI_ReceiveFIFOLevel (0x01) ½ÓÊÕFIFO * @retval fifolevel£ºSPIµÄFIFOÖеÃÓÐЧÊý¾Ý¸öÊý */ uint8_t SPI_GetFIFOLevel(const SPI_Type *SPIx,SPI_TXRXFIFOLevelDef FIFOLevelDef) { uint8_t fifolevel; /* Get the Transmit FIFO Level */ if(FIFOLevelDef==SPI_TransmitFIFOLevel) { fifolevel=(uint8_t)(SPIx->TXFLR &SPI_TXFLR_TFL_MASK); } /* Get the Receive FIFO Level */ else { fifolevel=(uint8_t)(SPIx->RXFLR &SPI_RXFLR_RFL_MASK); } /* return the fifolevel Value */ return fifolevel; } /** * @brief µÃµ½SPI״̬ * @param SPIx: SPIÍâÉèµÄÑ¡Ôñ * Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ: * @arg SPI0 £ºSPI0ÍâÉè * @arg SPI1 £ºSPI1ÍâÉè * @param SPI_StatusTypeDef ½«Òª»ñÈ¡µÄ״̬ÀàÐÍÑ¡Ôñ * Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ: * @arg SPI_SPIBusyFlagStatus £º SPI·±Ã¦±ê־λ * @arg SPI_TransmitFIFONotFullStatus£º ·¢ËÍFIFOδÂú * @arg SPI_TransmitFIFOEmptyStatus£º ·¢ËÍFIFOΪ¿Õ * @arg SPI_ReceiveFIFONotEmptyStatus£º ½ÓÊÕFIFO²»Îª¿Õ * @arg SPI_ReceiveFIFOFullStatus£º ½ÓÊÕFIFOÒÑÂú * @arg SPI_TransmissionErrorStatus£º Êý¾Ý·¢ËÍ´íÎó£¬Ö»ÓÐSPIΪ´Ó»úʱ²ÅÄÜʹÓô˹¦ÄÜ * @arg SPI_DataCollisionErrorStatus£º Êý¾Ý³åÍ»´íÎó£¬Ö»ÓÐSPIΪÖ÷»úʱ²ÅÓд˹¦ÄÜ * @retval SPI_Status£ºSPI״̬µÄÀàÐÍ * @arg 0:¶ÔӦ״̬δ²úÉú * @arg 1:¶ÔӦ״̬²úÉú */ uint8_t SPI_GetStatus(const SPI_Type *SPIx,SPI_StatusTypeDef SPI_StatusType) { uint8_t StatusTemp; /* Get all the status */ StatusTemp = (uint8_t)(SPIx->SR); /* get the selected status */ return (StatusTemp & (uint8_t)(1u<<(uint8_t)SPI_StatusType)); } /** * @brief SPIÖжÏʹÄÜ * @param SPIx: SPIÍâÉèµÄÑ¡Ôñ * Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ: * @arg SPI0 £ºSPI0ÍâÉè * @arg SPI1 £ºSPI1ÍâÉè * @param SPI_InterruptTypeDef ʹÄÜÖжÏÀàÐÍ£¬ÆäÖµÈçÏ£º * Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ: * @arg SPI_TransmitFIFOEmptyIT£º ·¢ËÍFIFOÒѿյÄÖжÏÑÚÂë * @arg SPI_TransmitFIFOOverflowIT£º ·¢ËÍFIFOÒç³öµÄÖжÏÑÚÂë * @arg SPI_ReceiveFIFOUnderflowIT£º ½ÓÊÕFIFOÏÂÒçµÄÖжÏÑÚÂë * @arg SPI_ReceiveFIFOOverflowIT£º ½ÓÊÕFIFOÒç³öµÄÖжÏÑÚÂë * @arg SPI_ReceiveFIFOFullIT £º ½ÓÊÕFIFOÒÑÂúµÄÖжÏÑÚÂë * @arg SPI_ALLIT £º ËùÓеÄÑÚÂë * @param NewState: ״̬ѡÔñ * Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ: * @arg ENABLE £ºÊ¹ÄÜ * @arg DISENABLE £ºÊ§ÄÜ * @retval None */ void SPI_InterruptEn(SPI_Type *SPIx, SPI_InterruptTypeDef SPI_Interrupt, FunctionalState NewState) { uint8_t itmask; if(SPI_Interrupt == SPI_ALLIT) { if (NewState != DISABLE) { /* Enable the selected SPI interrupts */ SPIx->IMR = 0xFFFFFFFFu; } else { /* Disable the selected SPI interrupts */ SPIx->IMR = 0u; } } else { /* Get the interrupt enable index */ itmask = (uint8_t)(1u<<(uint8_t)SPI_Interrupt); if (NewState != DISABLE) { /* Enable the selected SPI interrupts */ SPIx->IMR |= itmask; } else { /* Disable the selected SPI interrupts */ SPIx->IMR &= ~itmask; } } } /** * @brief SPIÇå³ýÖÐ¶Ï * @param SPIx: SPIÍâÉèµÄÑ¡Ôñ * Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ: * @arg SPI0 £ºSPI0ÍâÉè * @arg SPI1 £ºSPI1ÍâÉè * @param SPI_InterruptClearDef Çå³ýÖжϵÄÀàÐÍ£¬ÆäÖµÈçÏ£º * Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ: * @arg SPI_TransmitFIFOOverflowITClear£º Çå¿Õ·¢ËÍFIFOÒç³öÖжϼĴæÆ÷ * @arg SPI_ReceiveFIFOOverflowITClear£º Çå¿Õ½ÓÊÕFIFOÒç³öÖжϼĴæÆ÷ * @arg SPI_ReceiveFIFOUnderflowITClear£º Çå¿Õ½ÓÊÕFIFOÏÂÒçÖжϼĴæÆ÷ * @arg SPI_ALLITClear£º Çå¿ÕËùÓÐ״̬ * @retval ÖжÏÀàÐÍ */ uint8_t SPI_ClearInterrupt(const SPI_Type *SPIx, SPI_InterruptClearDef SPI_Interrupt2Clear) { uint8_t interrupt2clear; /* Clear Transmit FIFO Overflow Interrupt */ if(SPI_Interrupt2Clear==SPI_TransmitFIFOOverflowITClear) { interrupt2clear=(uint8_t)(SPIx->TXOICR); } /* Clear Receive FIFO Overflow Interrupt */ else if(SPI_Interrupt2Clear==SPI_ReceiveFIFOOverflowITClear) { interrupt2clear=(uint8_t)(SPIx->RXOICR); } /* Clear Receive FIFO Underflow Interrupt */ else if(SPI_Interrupt2Clear==SPI_ReceiveFIFOUnderflowITClear) { interrupt2clear=(uint8_t)(SPIx->RXUICR); } /* Clear Interrupt */ else { interrupt2clear=(uint8_t)(SPIx->ICR); } /* return the interrupt type */ return interrupt2clear; } /** * @brief µÃµ½SPIÖжÏ״̬£¬ÖÐ¶ÏÆÁ±ÎºóµÄ״̬ * @param SPIx: SPIÍâÉèµÄÑ¡Ôñ * Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ: * @arg SPI0 £ºSPI0ÍâÉè * @arg SPI1 £ºSPI1ÍâÉè * @param SPI_ITStatusMaskedDef »ñÈ¡µÄÖжÏÀàÐÍ * Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ: * @arg SPI_TransmitFIFOEmptyITStatus £º ·¢ËÍFIFO¿ÕÖжÏ״̬ * @arg SPI_TransmitFIFOOverflowITStatus£º ·¢ËÍFIFOÒç³öÖжÏ״̬ * @arg SPI_ReceiveFIFOUnderflowITStatus£º ½ÓÊÕFIFOÏÂÒçÖжÏ״̬ * @arg SPI_ReceiveFIFOOverflowITStatus£º ½ÓÊÕFIFOÒç³öÖжÏ״̬ * @arg SPI_ReceiveFIFOFullITStatus£º ½ÓÊÕFIFOÒÑÂúÖжÏ״̬ * @retval ÖжÏ״̬ */ uint8_t SPI_GetIntMaskedStatus(const SPI_Type *SPIx,SPI_ITStatusMaskedDef SPI_IntStatusType) { uint8_t IntStatusTemp; /* Get all the interrupt status */ IntStatusTemp = (uint8_t)(SPIx->ISR); /* get the selected interrupt status */ return (IntStatusTemp &(uint8_t)(1u<<(uint8_t)SPI_IntStatusType)); } /** * @brief »ñµÃSPIÖжÏǰ״̬£¬ÔÚÆÁ±Î֮ǰSPIÖжϵÄ״̬ * @param SPIx: SPIÍâÉèµÄÑ¡Ôñ * Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ: * @arg SPI0 £ºSPI0ÍâÉè * @arg SPI1 £ºSPI1ÍâÉè * @param SPI_RawITStatusTypeDef »ñÈ¡µÄÖжÏÀàÐÍ * Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ: * @arg SPI_TransmitFIFOEmptyRawITStatus£º ·¢ËÍFIFOԭʼÖжÏΪ¿Õ״̬ * @arg SPI_TransmitFIFOOverflowRawITStatus£º ·¢ËÍFIFOԭʼÖжÏÒç³ö״̬ * @arg SPI_ReceiveFIFOUnderflowRawITStatus£º ½ÓÊÕFIFOԭʼÖжÏÏÂÒç״̬ * @arg SPI_ReceiveFIFOOverflowRawITStatus£º ½ÓÊÕFIFOԭʼÖжÏÒç³ö״̬ * @arg SPI_ReceiveFIFOFullRawITStatus£º ½ÓÊÕFIFOԭʼÖжÏÒÑÂú״̬ * @retval ԭʼÖжÏ״̬ */ uint8_t SPI_GetRawIntStatus(const SPI_Type *SPIx,SPI_RawITStatusTypeDef SPI_RawIntStatusType) { uint8_t RawIntStatusTemp; /* Get all the Raw interrupt status */ RawIntStatusTemp =(uint8_t)(SPIx->RISR); /* get the selected Raw interrupt status */ return (RawIntStatusTemp &(uint8_t)(1u<<(uint8_t)SPI_RawIntStatusType)); } /** * @brief SPIÉèÖÃDMA·¢ËÍÊý¾ÝµÄ³¤¶È * @param SPIx: SPIÍâÉèµÄÑ¡Ôñ * Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ: * @arg SPI0 £ºSPI0ÍâÉè * @arg SPI1 £ºSPI1ÍâÉè * @param lenght £ºÊý¾Ý³¤¶È * @retval None */ void SPI_SetDMATxDataLenght(SPI_Type *SPIx,uint8_t lenght) { SPIx->DMATDLR = lenght; } /** * @brief SPIÉèÖÃDMA½ÓÊÕÊý¾Ý³¤¶È * @param SPIx: SPIÍâÉèµÄÑ¡Ôñ * Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ: * @arg SPI0 £ºSPI0ÍâÉè * @arg SPI1 £ºSPI1ÍâÉè * @param lenght £ºÊý¾Ý³¤¶È * @retval None */ void SPI_SetDMARxDataLenght(SPI_Type *SPIx,uint8_t lenght) { SPIx->DMARDLR = lenght; } /** * @brief SPIÉèÖÃDMA·¢ËÍʹÄÜ * @param SPIx: SPIÍâÉèµÄÑ¡Ôñ * Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ: * @arg SPI0 £ºSPI0ÍâÉè * @arg SPI1 £ºSPI1ÍâÉè * @param NewState: ״̬ѡÔñ * Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ: * @arg ENABLE £ºÊ¹ÄÜ * @arg DISENABLE £ºÊ§ÄÜ * @retval None */ void SPI_DMATxEnableCmd(SPI_Type *SPIx,FunctionalState NewState) { if (NewState != DISABLE) { /* Enable the selected SPI interrupts */ SPIx->DMACR |= SPI_DMACR_TDMAE_MASK; } else { /* Disable the selected SPI interrupts */ SPIx->DMACR &= ~SPI_DMACR_TDMAE_MASK; } } /** * @brief SPIÉèÖÃDMA½ÓÊÕʹÄÜ * @param SPIx: SPIÍâÉèµÄÑ¡Ôñ * Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ: * @arg SPI0 £ºSPI0ÍâÉè * @arg SPI1 £ºSPI1ÍâÉè * @param NewState: ״̬ѡÔñ * Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ: * @arg ENABLE £ºÊ¹ÄÜ * @arg DISENABLE £ºÊ§ÄÜ * @retval None */ void SPI_DMARxEnableCmd(SPI_Type *SPIx,FunctionalState NewState) { if (NewState != DISABLE) { /* Enable the selected SPI interrupts */ SPIx->DMACR |= SPI_DMACR_RDMAE_MASK; } else { /* Disable the selected SPI interrupts */ SPIx->DMACR &= ~SPI_DMACR_RDMAE_MASK; } } /** * @brief SPIÉèÖÃÑÓʱ²ÉÑùʱ¼ä * @param SPIx: SPIÍâÉèµÄÑ¡Ôñ * Õâ¸ö²ÎÊý¿ÉÒÔÈ¡ÏÂÃæµÄÖµ: * @arg SPI0 £ºSPI0ÍâÉè * @arg SPI1 £ºSPI1ÍâÉè * @param nclock £ºÑÓʱµÄʱ¼ä,ȡֵ(0-255) * @retval None */ void SPI_DelaySampling(SPI_Type *SPIx,uint32_t nclock) { SPIx->DLY = nclock; } /** * @} */ /** * @} */ /** * @} */ #ifdef __cplusplus } #endif /* __cplusplus */